The Aurora 64B/66B input buses of the
DLPC964 Controller operate at 10Gbps, and special care should be taken with trace length
matching of the traces within the bus. It is recommended that the Aurora 64B/66B input
buses of the DLPC964 have no more than 1ps skew between differential pairs within a bus,
and 0.2ps skew between p and n traces of a differential signal. For more detailed
information about PCB layout requirements of the AMD Aurora 64B/66B Interface, please
refer to
AMD's
website.