DLPS167A March 2024 – September 2024 DLPC964
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The DLP991U DMD has 16 MCP blocks with each MCP block being 4096 x 136 bits. The block being loaded can be any one of the 16 MCP blocks on the DMD, with access to each MCP block being independent upon which block was previously loaded or which will be loaded next.
The BLKADDR_[3:0] inputs define which of the 16 DMD blocks to update. Table 6-7 describes how BLKADDR_[3:0] is mapped to the MCP blocks for the different MCP modes available in the DMD. The effects and values of BLKADDR_[3:0] will be restricted based on the block mode selected.
Block selections shall conform to restrictions inherent in the design of the DLP991U DMD, i.e. x2 and x4 modes indicate only certain blocks can be simultaneously updated at any given time.