SNLS484I February 2015 – January 2025 DP83867CR , DP83867IR
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Certain applications can need this register to be configured to 0x0E81 to improve Short Cable performance. Changing this register to 0x0E81, does not effect Long Cable performance.
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15:10 | RESERVED | 0000 11, RO | RESERVED |
9:0 | FFE_EQ | 00 0010 1101, RW | FFE Equalizer Configuration Set this field to 10 1000 0001 when using cables of length <= 1m. |