SNLS484H February 2015 – June 2024 DP83867CR , DP83867IR
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
This register is the MDIO Manageable MMD access control. In general, register REGCR (4:0) is the device address DEVAD that directs any accesses of the ADDAR (0x000E) register to the appropriate MMD. REGCR also contains selection bits for auto increment of the data register. This register contains the device address to be written to access the extended registers. Write 0x1F into bits 4:0 of this register. REGCR also contains selection bits (15:14) for the address auto-increment mode of ADDAR.
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15:14 | Function | 0, RW | 00 = Address 01 = Data, no post increment 10 = Data, post increment on read and write 11 = Data, post increment on write only |
13:5 | RESERVED | 0, RO | RESERVED: Writes ignored, read as 0. |
4:0 | DEVAD | 0, RW | Device Address: In general, these bits [4:0] are the device address DEVAD that directs any accesses of ADDAR register (0x000E) to the appropriate MMD. Specifically, the DP83867 uses the vendor specific DEVAD [4:0] = 11111 for accesses. All accesses through registers REGCR and ADDAR should use this DEVAD. Transactions with other DEVAD are ignored. |