10 Revision History
Changes from Revision G (August 2022) to Revision H (June 2024)
- Changed Pin Functions table to add information on LED2
pin.Go
- Added information on LED_2Go
- Reduce duplicate Timing DiagramGo
- Remove the duplicate timing diagramGo
- Edit Wake on Lan sectionGo
- Edit Magic Packet StructureGo
- Change Magic Packet ExampleGo
- Edit Wake-on-LAN Configuration and StatusGo
- Edit Extended Address Space
AccessGo
- Edit Write (No Post Increment) OperationGo
- Edit Read (No Post Increment) OperationGo
- Edit Write (Post Increment) OperationGo
- Edit Read (Post Increment) OperationGo
- Clean up the languageGo
- Update Figure 8-15Go
- Clarify register 0x0004 half duplex advertisement bit Go
- Updated Auto-Negotiation Advertisement Register (ANAR)
registerGo
- Edit default value for bit [1:0]Go
- Add register 0x00A0 contentGo
- Add register 0x00A1 contentGo
- Add register 0x00A2 contentGo
- Add register 0x00A3 contentGo
- Add TDR Peak Sign infoGo
- Updated the Cable Line Driver sectionGo
- Add a note on power supply recommendation sesssionGo
Changes from Revision F (October 2019) to Revision G (August 2022)
- Updated Start of Frame Detect for IEEE 1588 time
stampGo
- Added following wording to the end of first paragraph in Section 7.4.3.9 "DP83867 devices manufactured after August, 2022, have an increased random seed value
that now includes 255 different seed values to expedite Auto-MDIX resolution with a link
partner."Go
- Removed Reg 0x01D5 Programmable Gain Register
(PROG_GAIN)Go
- Changed Bit 11:10 SPEED_OPT_ATTEMPT_CNT to RW description in
Go
- Changed bits 15:9, so that bit 12 can be '1'. Bit 7 description updated
Section 7.6.31
Go
- Added Register 0x008AGo
- Added Register 0x00B3Go
- Added Register 0x00C0Go
- Added Register 0x0100Go