SNLS504E October 2015 – May 2024 DP83867CS , DP83867E , DP83867IS
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
This register provides the ability to directly control any or all LED outputs.
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15 | RESERVED | 0, RO | RESERVED: Writes ignored, read as 0. |
14 | LED_GPIO_POLARITY | 1, RW | GPIO LED Polarity: 1 = Active high 0 = Active low |
13 | LED_GPIO_DRV_VAL | 0, RW | GPIO LED Drive Value: Value to force on GPIO LED This bit is only valid if enabled through LED_GPIO_DRV_EN. |
12 | LED_GPIO_DRV_EN | 0, RW | GPIO LED Drive Enable: 1 = Force the value of the LED_GPIO_DRV_VAL bit onto the GPIO LED. 0 = Normal operation |
11 | RESERVED | 0, RO | RESERVED: Writes ignored, read as 0. |
10 | LED_2_POLARITY | 1, RW | LED_2 Polarity: 1 = Active high 0 = Active low |
9 | LED_2_DRV_VAL | 0, RW | LED_2 Drive Value: Value to force on LED_2 This bit is only valid if enabled through LED_2_DRV_EN. |
8 | LED_2_DRV_EN | 0, RW | LED_2 Drive Enable: 1 = Force the value of the LED_2_DRV_VAL bit onto LED_2. 0 = Normal operation |
7 | RESERVED | 0, RO | RESERVED: Writes ignored, read as 0. |
6 | LED_1_POLARITY | 1, RW | LED_1 Polarity: 1 = Active high 0 = Active low |
5 | LED_1_DRV_VAL | 0, RW | LED_1 Drive Value: Value to force on LED_1 This bit is only valid if enabled through LED_1_DRV_EN. |
4 | LED_1_DRV_EN | 0, RW | LED_1 Drive Enable: 1 = Force the value of the LED_1_DRV_VAL bit onto LED_1. 0 = Normal operation |
3 | RESERVED | 0, RO | RESERVED: Writes ignored, read as 0. |
2 | LED_0_POLARITY | 1, RW | LED_0 Polarity: 1 = Active high 0 = Active low |
1 | LED_0_DRV_VAL | 0, RW | LED_0 Drive Value: Value to force on LED_0 This bit is only valid if enabled through LED_0_DRV_EN. |
0 | LED_0_DRV_EN | 0, RW | LED_0 Drive Enable: 1 = Force the value of the LED_0_DRV_VAL bit onto LED_0. 0 = Normal operation |