SNLS771A May   2024  – November 2024 DP83TC818S-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device Comparison Table
  6. 5Application Information
    1. 5.1 MAC Security
    2. 5.2 TC10 Sleep Wake-up
    3. 5.3 Time Syncronization
    4. 5.4 Integrated Audio Over Ethernet
    5. 5.5 DP83TC818EVM-MC and Software Support
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Community Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  8. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Package Option Addendum
      1. 7.1.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Integrated Audio Over Ethernet

DP83TC818S-Q1 offers audio clocking solutions for AVB (Audio Video Bridging) and other Audio transports protocols (IES676, IEEE 1733 RTP, Dante) by:

  • Generating IEEE 1722 Media Clock with embedded CRF packet decode
  • Synchronised clocks (FSYNC, BCLK, MCLK) for Audio interface I2S and TDMx.
DP83TC818S-Q1 Typical Audio Over Ethernet Architecture Figure 5-5 Typical Audio Over Ethernet Architecture
DP83TC818S-Q1 Audio Over Ethernet Architecture with DP83TC818S-Q1 Figure 5-6 Audio Over Ethernet Architecture with DP83TC818S-Q1