SNLS771A May   2024  – November 2024 DP83TC818S-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device Comparison Table
  6. 5Application Information
    1. 5.1 MAC Security
    2. 5.2 TC10 Sleep Wake-up
    3. 5.3 Time Syncronization
    4. 5.4 Integrated Audio Over Ethernet
    5. 5.5 DP83TC818EVM-MC and Software Support
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Community Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  8. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Package Option Addendum
      1. 7.1.1 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 DP83TC818EVM-MC and Software Support

DP83TC818EVM-MC

The DP83TC818EVM-MCsupports 100-Mbps speed and is IEEE 802.3bw compliant. This evaluation board is a media converter from 100Base-TX to 100Base-T1. There is an onboard MSP430F5529 for MDIO/MDC register access with the USB2MDIO and DIEP graphical user interface tools. DP83867 is provided for copper (100BASE-TX) support using RGMII MAC interface.

DP83TC818S-Q1 DP83TC818EVM-MC Figure 5-7 DP83TC818EVM-MC

Features:
  • TC10 Support
  • Jumpers to customize PHY strap settings
  • Option to supply external reference clock
  • Additional test points for debug
  • Status LEDs
    • Link
    • Link + Activity
    • Power-On
  • EVM User's Guide for reference

DIEP offers all your Ethernet PHY debug needs in one place including MDIO bus serial management, device control registers, access to both extended registers and standard registers, and the ability to save data read and run script text files.

  • NEW restructured navigation and register display
  • NEW improved text script execution
Debug Interface for Ethernet PHY's (DIEP)