SPRS993E March 2017 – December 2018 DRA76P , DRA77P
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
The CSI-2 port A is compliant with the MIPI D-PHY RX specification v1.00.00 and the MIPI CSI-2 specification v1.00, with 4 data differential lanes plus 1 clock differential lane in synchronous mode, double data rate:
The CSI-2 port B is compliant with the MIPI D-PHY RX specification v1.00.00 and the MIPI CSI-2 specification v1.00, with 2 data lanes plus 1 clock lane (differential) in synchronous mode, double data rate: