SPRS993E March 2017 – December 2018 DRA76P , DRA77P
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
In general, closely coupled differential signal traces are not an advantage on PCBs. When differential signals are closely coupled, tight spacing and width control is necessary. Very small width and spacing variations affect impedance dramatically, so tight impedance control can be more problematic to maintain in production. For PCBs with very tight space limitations (which are usually small) this can work, but for most PCBs, the loosely coupled option is probably best.
Loosely coupled PCB differential signals make impedance control much easier. Wider traces and spacing make obstacle avoidance easier (because each trace is not so fixed in position relative to the other), and trace width variations don’t affect impedance as much, therefore it’s easier to maintain an accurate impedance over the length of the signal. For longer routes, the wider traces also show reduced skin effect and therefore often result in better signal integrity with a larger eye diagram opening.
Table 7-24 shows the routing specifications for the PCIe data signals.
PARAMETER | MIN | TYP | MAX | UNIT |
---|---|---|---|---|
PCIe signal trace length (device balls to PCIe connector) | 4700(1) | Mills | ||
Differential pair trace matching | 5(2) | Mils | ||
Number of stubs allowed on PCIe traces(3) | 0 | stubs | ||
TX/RX pair differential impedance | 90 | 100 | 110 | Ω |
TX/RX single-ended impedance | 54 | 60 | 66 | Ω |
Pad size of vias on PCIe trace | 25(4) | Mils | ||
Hole size of vias on PCIe trace | 14 | Mils | ||
Number of vias on each PCIe trace | 0 | Vias | ||
PCIe differential pair to any other trace spacing | 2×DS(5) |
Item | Description | Reason |
---|---|---|
ESD part number | None | ESD suppression generally not used on PCIe |