SPRS993E March 2017 – December 2018 DRA76P , DRA77P
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
NOTE
For more information, see the Serial Communication Interface / Quad Serial Peripheral Interface section of the Device TRM.
SIGNAL NAME | DESCRIPTION | TYPE | BALL |
---|---|---|---|
qspi1_rtclk | QSPI1 Return Clock Input. Must be connected from QSPI1_SCLK on PCB. Refer to PCB Guidelines for QSPI1 | I | R2 |
qspi1_sclk | QSPI1 Serial Clock | O | R1 |
qspi1_cs0 | QSPI1 Chip Select[0]. This pin is Used for QSPI1 boot modes. | O | P2 |
qspi1_cs1 | QSPI1 Chip Select[1] | O | P1 |
qspi1_cs2 | QSPI1 Chip Select[2] | O | R5 |
qspi1_cs3 | QSPI1 Chip Select[3] | O | M6 |
qspi1_d0 | QSPI1 Data[0]. This pin is output data for all commands/writes and for dual read and quad read modes it becomes input data pin during read phase. | IO | U1 |
qspi1_d1 | QSPI1 Data[1]. Input read data in all modes. | I | P3 |
qspi1_d2 | QSPI1 Data[2]. This pin is used only in quad read mode as input data pin during read phase. | I | T2 |
qspi1_d3 | QSPI1 Data[3]. This pin is used only in quad read mode as input data pin during read phase. | I | R6 |