7.3.1 Sleep Mode

When the PWM commanded duty cycle input is lower than 0.38%, but not 0%, the phase outputs will be put into a high impedance state. The device will stop driving the motor. The device logic is still active during standby mode and the DRV10964 device will consume current as specified by I_VCC.

When the PWM commanded duty cycle input is driven to 0% (less than VIL_PWM for at least t_SLEEP time), the DRV10964 device will enter a low power sleep mode. In sleep mode, most of the circuitry in the device will be disabled to minimize the system current. The current consumption in this state is specified by I_{VCC_SLEEP}.

The device will remain in sleep mode until either the PWM commanded duty cycle input is driven to a logic high (higher than V_{IH_PWM}) or the PWM input pin is allowed to float. If the input is allowed to float an internal pullup resistor will raise the voltage to a logic high level.

Recovering from sleep mode is treated the same as power on condition as illustrated in Figure 14.

As part of the device initialization the motor resistance value and the motor Kt value are measured during the initial motor spin up as shown in Figure 14.

7.3.2 Speed Input and Control

The DRV10964 provides three-phase 25-kHz PWM outputs which have an average value of sinusoidal waveforms from phase to phase. When any phase is measured with reference to ground, the waveform observed will be a PWM encoded sinusoid coupled with third order harmonics as shown in Figure 2. This encoding scheme simplifies the driver requirements because there will always be one phase output that is equal to zero.

Figure 2. Sinusoidal Phase Encoding Used in DRV10964

The output amplitude is determined by the supply voltage (VCC) and the commanded PWM duty cycle (PWM) as described in Equation 1 and illustrated in Figure 3. The maximum amplitude is applied when the commanded PWM duty cycle is 100%.

Figure 3. Output Voltage Amplitude Adjustment

The motor speed is controlled indirectly by using the PWM command to control the amplitude of the phase voltages which are applied to the motor.

The duty cycle of PWM input is converted into a 9-bit digital number (from 0 to 511). The control resolution is 1/512 ≈ 0.2%. The duty cycle analyzer implements a first order transfer function between the input duty cycle and the 9-bit digital number. This is illustrated in Figure 4 and Figure 5.

Figure 4. PWM Command Input Controls the Output Peak Amplitude

Figure 5. Example of PWM Command Input Controlling the Output

The transfer function between the PWM commanded duty cycle and the output peak amplitude is adjustable in the DRV10964 device. The output peak amplitude is described by Equation 1 when PWM_dc > minimum operation duty cycle. The minimum operation duty cycle is 10%. When the PWM commanded duty cycle is lower than minimum operation duty cycle and higher than 0.38%, the output will be controlled at the minimum operation duty cycle. When the input duty cycle is lower than 0.38%, the DRV10964 device will not drive the output, and enters the standby mode. This is illustrated in Figure 6.

Figure 6. Speed Control Transfer Function

7.3.3 Motor Direction Change

The DRV10964 can be easily configured to drive the motor in either direction by setting the input on the FR (Forward Reverse) pin to a logic 1 or logic 0 state. The direction of commutation as described by the commutation sequence is illustrated in Table 1.

7.3.4 Motor Frequency Feedback (FG)

During operation of the DRV10964 device, the FG pin provides an indication of the speed of the motor. The output provided on this pin is configured by applying a logic signal to the FGS pin.

The formula to determine the speed of the motor is:

During Open Loop Acceleration the FG pin will provide an indication of the frequency of the signal which is driving the motor. The lock condition of the motor is not known during Open Loop Acceleration so it is possible that the FG could be toggling during this time even though the motor is not moving.

The FG pin has built in short circuit protection, which limits the current in the event that the pin is shorted to VCC. The current will be limited to I_{SC_FG}.

7.3.4.1 Tach Feedback During Spin Down

The DRV10964 will provide feedback on the FG pin during spin down of the motor. Figure 7 illustrates the behavior of the FG output. When DRV10964 PWM input is at 0% DRV10964 will provide the output of the U phase comparator on the FG pin until the motor speed drops below 10 Hz. When the motor speed is below 10 Hz the device will enter into the Sleep state and the FG output will be held at a constant value based on the last BEMF zero cross detection.

Figure 7. TACH Feedback on Spin Down

7.3.5 Lock Detection

When the motor is locked by some external condition the DRV10964 will detect the lock condition and will take action to protect the motor and the device. The lock condition must be properly detected whether it occurs as a result of a slowly increasing load or a sudden shock.

The DRV10964 reacts to lock conditions by stopping the motor drive. To stop driving the motor the phase outputs are placed into a high impedance state. To prevent the current which is flowing in the motor from being returned to the power supply (VCC) the DRV10964 uses an Ant-Voltage Surge feature. For more information on this feature, see Anti-Voltage Surge (AVS). After successfully transitioning into a high impedance state as the result of a lock condition the DRV10964 will attempt to restart the motor after t_{OFF_LOCK} seconds.

The DRV10964 has a comprehensive lock detect function which includes 5 different lock detect schemes. Each of these schemes detects a particular condition of lock as illustrated in Figure 8.

Figure 8. Lock Detect

The behavior of each lock detect scheme is described in the following sections.

7.3.5.3 Lock2: BEMF Abnormal

For any specific motor, the integrated value of BEMF during half of an electrical cycle will be a constant as illustrated by the shaded green area in Figure 9. This is true regardless of whether the motor runs fast or slow. The DRV10964 monitors this value and uses it as a criterion to determine if the motor is in a lock condition.

The DRV10964 uses the integrated BEMF to determine the Kt value of the motor during the initial motor start. Based on this measurement a range of acceptable Kt values is established. This range is between 1/2 x Kt and 4 x Kt During closed loop motor operation the Ktc value is continuously updated. If the calculated Ktc goes beyond the acceptable range a lock condition is triggered. This is illustrated in Figure 10.

Figure 9. BEMF Integration

Figure 10. Abnormal Kt Lock Detect

7.3.5.4 Lock4: Speed Abnormal

If the motor is in normal operation the motor BEMF will always be less than the voltage applied to the phase. The DRV10964 sensorless control algorithm is continuously updating the value of the motor BEMF based on the speed of the motor and the motor Kt as shown in Figure 11. If the calculated value for motor BEMF is higher than the applied voltage (U) for a certain period of time (t_{ON_LOCK}) then there is an error in the system. The calculated value for motor BEMF is wrong or the motor is out of phase with the commutation logic. When this condition is detected a lock detect is triggered.

Figure 11. BEMF Monitoring

7.3.6 Short Circuit Current Protection

The short circuit current protection function shuts off drive to the motor by placing the motor phases into a high impedance state if the current in any motor phase exceeds the short circuit protection limit I_SHT. The DRV10964 device will go through the initialization sequence and will attempt to restart the motor after the short circuit condition is removed. This function is intended to protect the device and the motor from catastrophic failure when subjected to a short circuit condition.

7.3.7 Anti-Voltage Surge (AVS)

Under normal operation the DRV10964 acts to transfer energy from the power supply to the motor to generate torque, which results in angular rotation of the motor. Under certain conditions, however, energy which is stored in the motor in the form of inductive energy or angular momentum (mechanical energy) can be returned to the power supply. This can happen whenever the output voltage is quickly interrupted or whenever the voltage applied to the motor becomes less than the BEMF voltage generated by the motor. The energy which is returned to the supply can cause the supply voltage to increase. This condition is referred to as voltage surge.

The DRV10964 includes an anti-voltage-surge (AVS) feature which prevents energy from being transferred from the motor to the power supply. This feature helps to protect the DRV10964 as well as any other components that are connected to the power supply (VCC).

7.3.7.1 Protecting Against the Return of Mechanical Energy

Mechanical energy is typically returned to the power supply when the speed command is abruptly decreased. If the voltage applied to the phase becomes less than the BEMF voltage then the motor will work as a generator and current will flow from the motor back to VCC. This is illustrated in Figure 12. To prevent this from happening, the DRV10964 buffers the speed command value and limits the rate at which it is able to change. The AVS function acts to ensure that the effective output amplitude (U) is maintained to be larger than the BEMF voltage. This prevents current from becoming less than zero. The value of BEMF used to perform this function is calculated by the motor Kt and the motor speed.

Figure 12. Mechanical AVS

7.3.7.2 Protecting Against the Return of Inductive Energy

When the DRV10964 suddenly stops driving the motor, the current which is flowing in the motor’s inductance will continue to flow. It flows through the intrinsic body diodes in the mosfets and charges VCC. An example of this behavior is illustrated by the two pictures in the top half of Figure 13. When the driver is active, the current flows from S1 to the motor and then to S6 and is returned to ground. When the driver is placed into a high impedance (tri-state) mode, the current goes flows from ground through the body diode of S2 to the motor and then through the body diode of S5 to VCC. The current will continue to flow through the motor’s inductance in this direction until the inductive energy is dissipated.

Figure 13. Inductive AVS

The lower two pictures in Figure 13 illustrate how the AVS circuit in the DRV10964 device prevents this energy from being returned to the supply. When the AVS condition is detected the DRV10964 device will act to turn on the low side device designated as S6. This allows the current flowing in the motor inductance to be returned to ground instead of being directed to the VCC supply voltage.

7.3.8 Overtemperature Protection

The DRV10964 contains a thermal shut down function which disables motor operation when the device junction temperature has exceeded T_SD. Motor operation will resume when the junction temperature becomes lower than T_SD - T_{SD_HYS}.

7.3.9 Undervoltage Protection

The DRV10964 contains an undervoltage lockout feature, which prevents motor operation whenever the supply voltage (VCC) becomes too low. Upon power up, the DRV10964 will operate once VCC rises above V_{UVLO_H}. The DRV10964 will continue to operate until VCC falls below V_{UVLO_L}.

7.3.10 CONFIG Configuration

The CONFIG pin provides an option for selecting the open loop to closed loop threshold. This is accomplished with the selection of a resistor divider between VCC and GND which is connected to the CONFIG pin. See Electrical Characteristics.

7.4.1 Spin up Settings

7.4.1.2 Motor Start

DRV10964 will start the motor using a procedure which is illustrated in Figure 14.

Figure 14. DRV10964 Initialization and Motor Start-up Sequence

7.4.1.3 Initial Speed Detect (ISD)

The ISD function is used to identify the initial condition of the motor.

Phase-to-phase comparators are used to detect the zero crossings of the motor’s BEMF voltage while it is coasting (motor phase outputs are in high-impedance state). Figure 15 shows the configuration of the comparators.

Figure 15. Initial Speed Detect Function

The motor speed is determined by measuring the time between two rising edges of either of the comparators.

If neither of the comparator outputs toggle for a given amount of time (80 ms), the condition is defined as stationary and the Align state will begin. If the comparators are toggling at a speed that is greater than this threshold then the DRV10964 will wait for the motor to slow down until the toggling is less than the threshold and it can be treated as stationary.