SLVSD14A
June 2017 – June 2020
DRV10983-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Application Schematic
4
Revision History
5
Description (Continued)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Regulators
8.3.1.1
Step-Down Regulator
8.3.1.2
3.3-V and 1.8-V LDO
8.3.2
Protection Circuits
8.3.2.1
Thermal Shutdown
8.3.2.2
Undervoltage Lockout (UVLO)
8.3.2.3
Overcurrent Protection
8.3.2.4
Lock
8.3.3
Motor Speed Control
8.3.4
Load Dump Handling
8.3.5
Sleep or Standby Condition
8.3.5.1
Required Sequence to Enter Sleep Mode
8.3.5.1.1
Option 1
8.3.5.1.2
Option 2
8.3.6
EEPROM Access
8.4
Device Functional Modes
8.4.1
Motor Parameters
8.4.1.1
Motor Phase Resistance
8.4.1.2
BEMF Constant
8.4.2
Starting the Motor Under Different Initial Conditions
8.4.2.1
Case 1 – Motor is Stationary
8.4.2.2
Case 2 – Motor is Spinning in the Forward Direction
8.4.2.3
Case 3 – Motor is Spinning in the Reverse Direction
8.4.3
Motor Start Sequence
8.4.3.1
Initial Speed Detect
8.4.3.2
Motor Resynchronization
8.4.3.3
Reverse Drive
8.4.3.4
Motor Brake
8.4.3.5
Motor Initialization
8.4.3.5.1
Align
8.4.3.5.2
Initial Position Detect (IPD)
8.4.3.5.2.1
IPD Operation
8.4.3.5.2.2
IPD Release Mode
8.4.3.5.2.3
IPD Advance Angle
8.4.3.5.3
Motor Start
8.4.3.6
Start-Up Timing
8.4.4
Align Current
8.4.5
Start-Up Current Setting
8.4.5.1
Start-Up Current Ramp-Up
8.4.6
Closed Loop
8.4.6.1
Half-Cycle Control and Full-Cycle Control
8.4.6.2
Analog-Mode Speed Control
8.4.6.3
Digital PWM-Input-Mode Speed Control
8.4.6.4
I2C-Mode Speed Control
8.4.6.5
Closed-Loop Accelerate
8.4.6.6
Control Coefficient
8.4.6.7
Commutation Control Advance Angle
8.4.7
Current Limit
8.4.7.1
Acceleration Current Limit
8.4.8
Lock Detect and Fault Handling
8.4.8.1
Lock0: Lock-Detection Current Limit Triggered
8.4.8.2
Lock1: Abnormal Speed
8.4.8.3
Lock2: Abnormal Kt
8.4.8.4
Lock3 (Fault3): No-Motor Fault
8.4.8.5
Lock4: Open-Loop Motor-Stuck Lock
8.4.8.6
Lock5: Closed Loop Motor Stuck Lock
8.4.9
Anti Voltage Suppression Function
8.4.9.1
Mechanical AVS Function
8.4.9.2
Inductive AVS Function
8.4.10
PWM Output
8.4.11
FG Customized Configuration
8.4.11.1
FG Output Frequency
8.4.11.2
FG Open Loop and Lock Behavior
8.4.12
Diagnostics and Visibility
8.4.12.1
Motor-Status Readback
8.4.12.2
Motor-Speed Readback
8.4.12.3
Motor Electrical-Period Readback
8.4.12.4
BEMF Constant Read Back
8.4.12.5
Motor Estimated Position by IPD
8.4.12.6
Supply-Voltage Readback
8.4.12.7
Speed-Command Readback
8.4.12.8
Speed-Command Buffer Readback
8.4.12.9
Fault Diagnostics
8.5
Register Maps
8.5.1
I2C Serial Interface
8.5.2
Register Map
8.5.3
Register Descriptions
8.5.3.1
FaultReg Register (address = 0x00) [reset = 0x00]
Table 11.
FaultReg Register Field Descriptions
8.5.3.2
MotorSpeed Register (address = 0x01) [reset = 0x00]
Table 12.
MotorSpeed Register Field Descriptions
8.5.3.3
MotorPeriod Register (address = 0x02) [reset = 0x00]
Table 13.
MotorPeriod Register Field Descriptions
8.5.3.4
MotorKt Register (address = 0x03) [reset = 0x00]
Table 14.
MotorKt Register Field Descriptions
8.5.3.5
MotorCurrent Register (address = 0x04) [reset = 0x00]
Table 15.
MotorCurrent Register Field Descriptions
8.5.3.6
IPDPosition–SupplyVoltage Register (address = 0x05) [reset = 0x00]
Table 16.
IPDPosition–SupplyVoltage Register Field Descriptions
8.5.3.7
SpeedCmd–spdCmdBuffer Register (address = 0x06) [reset = 0x00]
Table 17.
SpeedCmd–spdCmdBuffer Register Field Descriptions
8.5.3.8
AnalogInLvl Register (address = 0x07) [reset = 0x00]
Table 18.
AnalogInLvl Register Field Descriptions
8.5.3.9
DeviceID–RevisionID Register (address = 0x08) [reset = 0x00]
Table 19.
DeviceID–RevisionID Register Field Descriptions
8.5.3.10
DeviceID–RevisionID Register (address = 0x08) [reset = 0x00]
Table 20.
DeviceID–RevisionID Register Field Descriptions
8.5.3.11
Unused Registers (addresses = 0x011 Through 0x2F)
8.5.3.12
SpeedCtrl Register (address = 0x30) [reset = 0x00]
Table 21.
SpeedCtrl Register Field Descriptions
8.5.3.13
EEPROM Programming1 Register (address = 0x31) [reset = 0x00]
Table 22.
EEPROM Programming1 Register Field Descriptions
8.5.3.14
EEPROM Programming2 Register (address = 0x32) [reset = 0x00]
Table 23.
EEPROM Programming2 Register Field Descriptions
8.5.3.15
EEPROM Programming3 Register (address = 0x33) [reset = 0x00]
Table 24.
EEPROM Programming3 Register Field Descriptions
8.5.3.16
EEPROM Programming4 Register (address = 0x34) [reset = 0x00]
Table 25.
EEPROM Programming4 Register Field Descriptions
8.5.3.17
EEPROM Programming5 Register (address = 0x35) [reset = 0x00]
Table 26.
EEPROM Programming5 Register Field Descriptions
8.5.3.18
EEPROM Programming6 Register (address = 0x36) [reset = 0x00]
Table 27.
EEPROM Programming6 Register Field Descriptions
8.5.3.19
Unused Registers (addresses = 0x37 Through 0x5F)
8.5.3.20
EECTRL Register (address = 0x60) [reset = 0x00]
Table 28.
EECTRL Register Field Descriptions
8.5.3.21
Unused Registers (addresses = 0x61 Through 0x8F)
8.5.3.22
CONFIG1 Register (address = 0x90) [reset = 0x00]
Table 29.
CONFIG1 Register Field Descriptions
8.5.3.23
CONFIG2 Register (address = 0x91) [reset = 0x00]
Table 30.
CONFIG2 Register Field Descriptions
8.5.3.24
CONFIG3 Register (address = 0x92) [reset = 0x00]
Table 31.
CONFIG3 Register Field Descriptions
8.5.3.25
CONFIG4 Register (address = 0x93) [reset = 0x00]
Table 32.
CONFIG4 Register Field Descriptions
8.5.3.26
CONFIG5 Register (address = 0x94) [reset = 0x00]
Table 33.
CONFIG5 Register Field Descriptions
8.5.3.27
CONFIG6 Register (address = 0x95) [reset = 0x00]
Table 34.
CONFIG6 Register Field Descriptions
8.5.3.28
CONFIG7 Register (address = 0x96) [reset = 0x00]
Table 35.
CONFIG7 Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Trademarks
12.2
Electrostatic Discharge Caution
12.3
Receiving Notification of Documentation Updates
12.4
Community Resources
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PWP|24
MPDS372A
Thermal pad, mechanical data (Package|Pins)
PWP|24
PPTD264C
Orderable Information
slvsd14a_oa
slvsd14a_pm
11.1
Layout Guidelines
Place the V
CC
, GND, U, V, and W pins with thick traces because high current passes through these traces.
Place the 10-µF capacitor between V
CC
and GND, and as close to the V
CC
and GND pins as possible.
Place the capacitor between CPP and CPN, and as close to the CPP and CPN pins as possible.
Connect the GND, PGND, and SWGND under the thermal pad.
Keep the thermal pad connection as large as possible, on both the bottom side and top sides. It should be one piece of copper without any gaps.
If EEPROM is programmed, it is okay to leave SCL and SDA floating.