SLVSE89C August 2017 – June 2020 DRV10987
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY CURRENT (DRV10987D) | ||||||
IccSLEEP1 | Sleep current | VSPEED = 0 V; VCC = 12 V; TA = 25℃ | 48 | 54 | µA | |
VSPEED = 0 V; VCC = 12 V; across temperature | 81 | |||||
Icc | Active current | VSPEED > 0 V; step-down regulator with inductor (buck mode); no motor load | 10 | 15 | mA | |
VSPEED > 0 V; step-down regulator with resistor (linear mode); no motor load | 13 | 16 | ||||
SUPPLY CURRENT (DRV10987S) | ||||||
IccSTBY | Standby current | VSPEED = 0 V; step-down regulator with
inductor (buck mode) |
8.5 | 14 | mA | |
VSPEED = 0 V; buck regulator with
resistor (linear mode) |
11 | 15 | ||||
Icc | Active current | VSPEED > 0 V; buck regulator with
inductor; no motor load |
10 | 15 | mA | |
VSPEED > 0 V; buck regulator with
resistor; no motor load |
13 | 16 | ||||
UVLO | ||||||
VUVLO_R | UVLO rising threshold voltage | 5.8 | 6 | 6.2 | V | |
VUVLO_F | UVLO falling threshold voltage | 5.6 | 5.8 | 6 | V | |
VUVLO_HYS | UVLO threshold voltage hysteresis | 170 | 195 | 220 | mV | |
VV1P8_UVLO_R | V1P8 UVLO rising threshold | 1.5 | 1.6 | 1.7 | V | |
VV1P8_UVLO_F | V1P8 UVLO falling threshold | 1.4 | 1.55 | 1.65 | V | |
VV3P3_UVLO_R | V3P3 UVLO rising threshold | 2.7 | 2.85 | 2.95 | V | |
VV3P3_UVLO_F | V3P3 UVLO falling threshold | 2.5 | 2.7 | 2.8 | V | |
VVREG_UVLO_R | VREG UVLO rising threshold | 4 | 4.2 | 4.3 | V | |
VVREG_UVLO_F | VREG UVLO falling threshold | 3.9 | 4.2 | V | ||
LDO OUTPUT | ||||||
V3P3 | Output voltage | Step-down regulator with inductor (buck mode), 20-mA load | 3.1 | 3.3 | 3.5 | V |
Step-down regulator with resistor (linear mode), no load | 3.1 | 3.3 | 3.5 | |||
IV3P3_MAX | Maximum load from V3P3 | Step-down regulator with inductor (buck mode) | 20 | mA | ||
V1P8 | Output voltage | No load | 1.7 | 1.8 | 1.9 | V |
STEP-DOWN REGULATOR | ||||||
VREG | Regulator output voltage | LSW = 47 µH, CSW = 10 µF
Iload = 100 mA |
4.5 | 5 | 5.5 | V |
RSW = 39 Ω, CSW = 10 µF
Iload = 5 mA |
4.5 | 5 | 5.5 | |||
IREG_MAX_L | Maximum load from VREG in buck mode | LSW = 47 µH, CSW = 10 µF | 100 | mA | ||
IREG_MAX_R | Maximum load from VREG in linear mode | RSW = 39 Ω, CSW = 10 µF | 5 | mA | ||
INTEGRATED MOSFET | ||||||
rDS(ON) | Series resistance (H + L) | TA = 25˚C; VCC > 6.5 V; IO = 1 A | 250 | 400 | mΩ | |
TA = 125˚C; VCC > 6.5V; IO = 1 A | 325 | 550 | ||||
SPEED – ANALOG MODE | ||||||
VAN/A_FS | Analog full-speed voltage | V(V3P3) × 0.9 | V(V3P3) | V | ||
VAN/A_ZS | Analog zero-speed voltage | 0 | 100 | mV | ||
tSAM | Sampling period for analog voltage on SPEED pin | 320 | µs | |||
VAN/A_RES | Analog voltage resolution | 6.5 | mV | |||
SPEED – PWM DIGITAL MODE | ||||||
VDIG_IH | PWM input high voltage | 2.2 | V | |||
VDIG_IL | PWM input low voltage | 0.6 | V | |||
ƒPWM | PWM input frequency | 0.1 | 100 | kHz | ||
SLEEP MODE (DRV10987D) | ||||||
VEN_SL | Analog voltage to enter sleep mode | SpdCtrlMd = 0 (analog mode) | 100 | mV | ||
VEX_SL | Analog voltage to exit sleep mode | SpdCtrlMd = 0 (analog mode) | 2.2 | V | ||
tEX_SL_ANA | Time needed to exit from sleep mode | SpdCtrlMd = 0 (analog mode)
VSPEED > VEX_SL |
2 | µs | ||
tEX_SL_DR_ANA | Time taken to drive motor after exiting from sleep mode | SpdCtrlMd = 0 (analog mode)
VSPEED > VEN_SL; ISDen = 0; BrkDoneThr[2:0] = 0 |
350 | ms | ||
tEX_SL_PWM | Time needed to exit from sleep mode | SpdCtrlMd = 1 (PWM mode)
VSPEED > VDIG_IH |
2 | µs | ||
tEX_SL_DR_PWM | Time taken to drive motor after exiting from sleep mode | SpdCtrlMd = 1 (PWM mode)
VSPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0 |
350 | ms | ||
tEN_SL_ANA | Time needed to enter sleep mode | SpdCtrlMd = 0 (analog mode)
VSPEED < VEN_SL; AvSIndEn = 0 |
6 | ms | ||
tEN_SL_PWM | Time needed to enter sleep mode | SpdCtrlMd = 1 (PMW mode)
VSPEED < VDIG_IL; AvSIndEn = 0 |
60 | ms | ||
RPD_SPEED_SL | Internal SPEED pin pull down resistance to ground | VSPEED = 0 (Sleep mode) | 55 | kΩ | ||
STANDBY MODE (DRV10987S) | ||||||
VEN_SB | Analog voltage to enter standby mode | SpdCtrlMd = 0 (analog mode) | 100 | mV | ||
VEX_SB | Analog voltage to exit standby mode | SpdCtrlMd = 0 (analog mode) | 0.17 | V | ||
tEX_SB_ANA | Time needed to exit from standby mode | SpdCtrlMd = 0 (analog mode)
VSPEED > VEX_SB |
1 | 700 | ms | |
tEX_SB_DR_ANA | Time taken to drive motor after exiting standby mode | SpdCtrlMd = 0 (analog mode)
VSPEED > VEN_SB; ISDen = 0; BrkDoneThr[2:0] = 0 |
350 | ms | ||
tEX_SB_PWM | Time needed to exit from standby mode | SpdCtrlMd = 1 (PWM mode)
VSPEED > VDIG_IH |
2 | µs | ||
tEX_SB_DR_PWM | Time taken to drive motor after exiting standby mode | SpdCtrlMd = 1 (PWM mode)
VSPEED_DUTY > 0; ISDen = 0; BrkDoneThr[2:0] = 0 |
350 | ms | ||
tEN_SB_ANA | Time needed to enter standby mode | SpdCtrlMd = 0 (analog mode)
VSPEED < VEN_SB; AvSIndEn = 0 |
6 | ms | ||
tEN_SB_PWM | Time needed to enter standby mode | SpdCtrlMd = 1 (PMW mode)
VSPEED < VDIG_IL; AvSIndEn = 0 |
60 | ms | ||
DIGITAL I/O (DIR INPUT, FG OUTPUT) | ||||||
VDIR_H | Input high | 2.2 | V | |||
VDIR_L | Input low | 0.6 | V | |||
VFG_OH | Output high voltage | Io = 5 mA | 3.3 | V | ||
VFG_OL | Output low voltage | Io = 5 mA | 0.6 | V | ||
I2C SERIAL INTERFACE | ||||||
VI2C_H | Input high | 2.2 | V | |||
VI2C_L | Input low | 0.6 | V | |||
fI2C | I2C clock frequency | 0 | 400 | kHz | ||
LOCK DETECTION RELEASE TIME | ||||||
tLOCK_OFF | Lock release time | 5 | s | |||
tLCK_ETR | Lock enter time | 0.3 | s | |||
OVERCURRENT PROTECTION | ||||||
IOC_limit_HS | HS overcurrent protection | VCC < 28.5 V | 3.5 | 4.25 | 5.5 | A |
IOC_limit_LS | LS overcurrent protection | VCC < 28.5 V | 3.5 | 4.25 | 5.5 | A |
THERMAL SHUTDOWN | ||||||
TSDN | Junction temperature shutdown threshold | 150 | 165 | 180 | °C | |
TSDN_HYS | Junction temperature shutdown hysteresis | 15 | 20 | 25 | °C | |
TWARN | Junction temperature warning threshold | 115 | 125 | 140 | °C | |
PHASE DRIVER | ||||||
SLPH_LH0 | Phase slew rate switching low to high | PHslew = 0; measure 20% to 80%;
VCC = 12 V |
85 | 120 | 145 | V/µs |
SLPH_LH1 | Phase slew rate switching low to high | PHslew = 1; measure 20% to 80%;
VCC = 12 V |
60 | 80 | 100 | V/µs |
SLPH_LH2 | Phase slew rate switching low to high | PHslew = 2; measure 20% to 80%;
VCC = 12 V |
38 | 50 | 62 | V/µs |
SLPH_LH3 | Phase slew rate switching low to high | PHslew = 3; measure 20% to 80%;
VCC = 12 V |
27 | 35 | 44 | V/µs |
SLPH_HL0 | Phase slew rate switching high to low | PHslew = 0; measure 80% to 20%;
VCC = 12 V |
85 | 120 | 145 | V/µs |
SLPH_HL1 | Phase slew rate switching high to low | PHslew = 1; measure 80% to 20%;
VCC = 12 V |
59 | 80 | 100 | V/µs |
SLPH_HL2 | Phase slew rate switching high to low | PHslew = 2; measure 80% to 20%;
VCC = 12 V |
36 | 50 | 60 | V/µs |
SLPH_HL3 | Phase slew rate switching high to low | PHslew = 3; measure 80% to 20%;
VCC = 12 V |
25 | 35 | 45 | V/µs |
EEPROM | ||||||
EEProg | Programing voltage | 6.2 | V | |||
EERET | Retention | 10 | Years | |||
EEEND | Endurance | 1000 | Cycles | |||
OVERVOLTAGE PROTECTION | ||||||
VOV_R | Overvoltage protection rising VCC threshold | 28.5 | 29.2 | 30 | V | |
VOV_F | Overvoltage protection exit on falling VCC threshold | 27.7 | 28.2 | 28.8 | V | |
VOV_HYS | Overvoltage protection hysteresis | 0.73 | 1 | 1.1 | V | |
BEMF COMPARATOR | ||||||
BEMFHYS | BEMF comparator hysteresis | BEMF_HYS = 0 | 7 | 20 | 30 | mV |
BEMF_HYS = 1 | 17 | 40 | 51 |