7.1 Overview

The DRV120 device provides a PWM current converter for use with solenoids. The device provides a quick ramp to a high peak current value in order to ensure opening of the valve or relay. The peak current is held for a programmable time and then released to a lower value to maintain the open state of the valve or relay while reducing the total current consumption. Peak current duration, peak current amount, hold current amount (in the 14-pin package), and PWM frequency can all be controlled by external components or used at default levels by omitting these components (except peak current duration). Enable and disable of the switch is controlled by the EN pin which has an internal pullup to V_IN. The DRV120 also features a wide V_IN range from 6 V to 28 V. Finally, the 14-pin package features an open-drain pulldown path on the STATUS pin which is enabled as long as undervoltage lockout or thermal shutdown has not triggered.

7.2 Functional Block Diagram

7.3 Feature Description

The DRV120 controls the current through the solenoid as shown in Figure 2. Activation starts when EN pin voltage is pulled high either by an external driver or internal pullup. In the beginning of activation, DRV120 allows the load current to ramp up to the peak value I_PEAK and it regulates it at the peak value for the time, t_KEEP, before reducing it to I_HOLD. The load current is regulated at the hold value as long as the EN pin is kept high. The initial current ramp-up time depends on the inductance and resistance of the solenoid. Once EN pin is driven to GND, DRV120 allows the solenoid current to decay to zero.

Figure 2. Typical Current Waveform Through the Solenoid

t_KEEP is set externally by connecting a capacitor to the KEEP pin. A constant current is sourced from the KEEP pin that is driven into an external capacitor resulting in a linear voltage ramp. When the KEEP pin voltage reaches 75 mV, the current regulation reference voltage, V_REF, is switched from V_PEAK to V_HOLD. Dependency of t_KEEP from the external capacitor size can be calculated with Equation 1.

Equation 1.

The current control loop regulates, cycle-by-cycle, the solenoid current by using an internal current-sensing resistor and MOSFET switch. During the ON-cycle, current flows from OUT pin to GND pin through the internal switch as long as voltage across the current-sensing resistor is less than V_REF. As soon as the current sensing voltage is above V_REF, the internal switch is immediately turned off until the next ON-cycle is triggered by the internal PWM clock signal. In the beginning of each ON-cycle, the internal switch is turned on and stays on for at least the time determined by the minimum PWM signal duty cycle, D_MIN.

I_PEAK and I_HOLD depend on fixed resistance values R_PEAK and R_HOLD approximately as shown in Figure 3. If the PEAK pin is connected to ground or if R_PEAK or R_HOLD is below 33.33 kΩ (typical value), then I_PEAK is at its default value (internal setting) of 200 mA for I_PEAK and 50 mA for I_HOLD. The I_PEAK value can alternatively be set by connecting an external resistor to ground from the PEAK pin. For example, if a 50-kΩ (= R_PEAK) resistor is connected between PEAK and GND, then the externally set I_PEAK level will be 250 mA. If R_PEAK = 200 kΩ is, then the externally set I_PEAK level will be 83 mA. In the 8-pin package, I_HOLD is set to 50 mA by default. In the 14-pin package, external settings of I_HOLD works in the same way as I_PEAK. External settings for I_PEAK and I_HOLD are independent of each other. Approximate I_PEAK and I_HOLD values can be calculated by using Equation 2 and Equation 3.

Equation 2.

Equation 3.

Figure 3. PEAK and HOLD Mode Current Settings

Frequency of the internal PWM clock signal, PWM_CLK, that triggers each ON-cycle can be adjusted by external resistor, R_OSC, connected between OSC and GND. Frequency as a function of resistor value is shown in Figure 4. Default frequency is used when OSC is connected to GND directly. Use Equation 4 to calculate the PWM frequency as a function of the external fixed adjustment resistor value (greater than 160 kΩ).

Equation 4.

Figure 4. PWM Clock Frequency Setting

Open-drain STATUS output is deactivated if either undervoltage lockout or thermal shutdown blocks have triggered.

7.4 Device Functional Modes

The DRV120 transitions through three different states. The first is the OFF state, where the EN pin is low and the PWM output is off. The second is the PEAK state, which begins when the EN pin is pulled high by an external controller or internal pullup, and ends once t_KEEP has been reached. During this state, the PWM operates in order to reach the I_PEAK set by the R_PEAK. Finally, once t_KEEP has been reached, the PWM continues to operate, but at the I_HOLD level. This continues until the EN pin is forced low again and the PWM turns off.