SLOS824C
December 2012 – March 2018
DRV2604
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Simplified Schematic
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Support for ERM and LRA Actuators
7.3.2
Smart-Loop Architecture
7.3.2.1
Auto-Resonance Engine for LRA
7.3.2.2
Real-Time Resonance-Frequency Reporting for LRA
7.3.2.3
Automatic Overdrive and Braking
7.3.2.3.1
Startup Boost
7.3.2.3.2
Brake Factor
7.3.2.3.3
Brake Stabilizer
7.3.2.4
Automatic Level Calibration
7.3.2.4.1
Automatic Compensation for Resistive Losses
7.3.2.4.2
Automatic Back-EMF Normalization
7.3.2.4.3
Calibration Time Adjustment
7.3.2.4.4
Loop-Gain Control
7.3.2.4.5
Back-EMF Gain Control
7.3.2.5
Actuator Diagnostics
7.3.3
Open-Loop Operation for LRA
7.3.4
Open-Loop Operation for ERM
7.3.5
Flexible Front-End Interface
7.3.5.1
PWM Interface
7.3.5.2
Internal Memory Interface
7.3.5.2.1
Waveform Sequencer
7.3.5.2.2
Library Parameterization
7.3.5.3
Real-Time Playback (RTP) Interface
7.3.5.4
Analog Input Interface
7.3.5.5
Input Trigger Option
7.3.5.5.1
I2C Trigger
7.3.5.5.2
Edge Trigger
7.3.5.5.3
Level Trigger
7.3.5.6
Noise Gate Control
7.3.6
Edge Rate Control
7.3.7
Constant Vibration Strength
7.3.8
Battery Voltage Reporting
7.3.9
One-Time Programmable (OTP) Memory for Configuration
7.3.10
Low-Power Standby
7.3.11
Device Protection
7.3.11.1
Thermal Protection
7.3.11.2
Overcurrent Protection of the Actuator
7.4
Device Functional Modes
7.4.1
Power States
7.4.1.1
Operation With VDD < 2.5 V (Minimum VDD)
7.4.1.2
Operation With VDD > 6 V (Absolute Maximum VDD)
7.4.1.3
Operation With EN Control
7.4.1.4
Operation With STANDBY Control
7.4.1.5
Operation With DEV_RESET Control
7.4.1.6
Operation in the Active State
7.4.2
Changing Modes of Operation
7.4.3
Operation of the GO Bit
7.4.4
Operation During Exceptional Conditions
7.4.4.1
Operation With No Actuator Attached
7.4.4.2
Operation With a Short at REG Pin
7.4.4.3
Operation With a Short at OUT+, OUT–, or Both
7.5
Programming
7.5.1
Auto-Resonance Engine Programming for the LRA
7.5.1.1
Drive-Time Programming
7.5.1.2
Current-Dissipation Time Programming
7.5.1.3
Blanking Time Programming
7.5.2
Automatic-Level Calibration Programming
7.5.2.1
Rated Voltage Programming
7.5.2.2
Overdrive Voltage-Clamp Programming
7.5.3
I2C Interface
7.5.3.1
TI Haptic Broadcast Mode
7.5.3.2
General I2C Operation
7.5.3.3
Single-Byte and Multiple-Byte Transfers
7.5.3.4
Single-Byte Write
7.5.3.5
Multiple-Byte Write and Incremental Multiple-Byte Write
7.5.3.6
Single-Byte Read
7.5.3.7
Multiple-Byte Read
7.5.4
Programming for Open-Loop Operation
7.5.4.1
Programming for ERM Open-Loop Operation
7.5.4.2
Programming for LRA Open-Loop Operation
7.5.5
Programming for Closed-Loop Operation
7.5.6
Auto Calibration Procedure
7.5.7
Programming On-Chip OTP Memory
7.5.8
Waveform Playback Programming
7.5.8.1
Data Formats for Waveform Playback
7.5.8.1.1
Open-Loop Mode
7.5.8.1.2
Closed-Loop Mode, Unidirectional
7.5.8.1.3
Closed-Loop Mode, Bidirectional
7.5.8.2
Waveform Setup and Playback
7.5.8.2.1
Waveform Playback Using RTP Mode
7.5.8.2.2
Waveform Playback Using the Analog-Input Mode
7.5.8.2.3
Waveform Playback Using PWM Mode
7.5.8.2.4
Loading Data to RAM
7.5.8.2.4.1
Header Format
7.5.8.2.4.2
RAM Waveform Data Format
7.5.8.2.5
Waveform Sequencer
7.5.8.2.6
Waveform Triggers
7.6
Register Map
7.6.1
Status (Address: 0x00)
Table 3.
Status Register Field Descriptions
7.6.2
Mode (Address: 0x01)
Table 4.
Mode Register Field Descriptions
7.6.3
Real-Time Playback Input (Address: 0x02)
Table 5.
Real-Time Playback Input Register Field Descriptions
7.6.4
HI_Z (Address: 0x03)
Table 6.
HI_Z Register Field Descriptions
7.6.5
Waveform Sequencer (Address: 0x04 to 0x0B)
Table 7.
Waveform Sequencer Register Field Descriptions
7.6.6
GO (Address: 0x0C)
Table 8.
GO Register Field Descriptions
7.6.7
Overdrive Time Offset (Address: 0x0D)
Table 9.
Overdrive Time Offset Register Field Descriptions
7.6.8
Sustain Time Offset, Positive (Address: 0x0E)
Table 10.
Sustain Time Offset, Positive Register Field Descriptions
7.6.9
Sustain Time Offset, Negative (Address: 0x0F)
Table 11.
Sustain Time Offset, Negative Register Field Descriptions
7.6.10
Brake Time Offset (Address: 0x10)
Table 12.
Brake Time Offset Register Field Descriptions
7.6.11
Rated Voltage (Address: 0x16)
Table 13.
Rated Voltage Register Field Descriptions
7.6.12
Overdrive Clamp Voltage (Address: 0x17)
Table 14.
Overdrive Clamp Voltage Register Field Descriptions
7.6.13
Auto-Calibration Compensation Result (Address: 0x18)
Table 15.
Auto-Calibration Compensation-Result Register Field Descriptions
7.6.14
Auto-Calibration Back-EMF Result (Address: 0x19)
Table 16.
Auto-Calibration Back-EMF Result Register Field Descriptions
7.6.15
Feedback Control (Address: 0x1A)
Table 17.
Feedback Control Register Field Descriptions
7.6.16
Control1 (Address: 0x1B)
Table 18.
Control1 Register Field Descriptions
7.6.17
Control2 (Address: 0x1C)
Table 19.
Control2 Register Field Descriptions
7.6.18
Control3 (Address: 0x1D)
Table 20.
Control3 Register Field Descriptions
7.6.19
Control4 (Address: 0x1E)
Table 21.
Control4 Register Field Descriptions
7.6.20
V(BAT) Voltage Monitor (Address: 0x21)
Table 22.
V(BAT) Voltage-Monitor Register Field Descriptions
7.6.21
LRA Resonance Period (Address: 0x22)
Table 23.
LRA Resonance-Period Register Field Descriptions
7.6.22
RAM-Address Upper Byte (Address: 0xFD)
Table 24.
RAM-Address Upper-Byte Register Field Descriptions
7.6.23
RAM-Address Lower Byte (Address: 0xFE)
Table 25.
RAM Address Lower Byte Register Field Descriptions
7.6.24
RAM Data Byte (Address: 0xFF)
Table 26.
RAM-Data Byte Register Field Descriptions
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Actuator Selection
8.2.2.1.1
Eccentric Rotating-Mass Motors (ERM)
8.2.2.1.2
Linear Resonance Actuators (LRA)
8.2.2.1.2.1
Auto-Resonance Engine for LRA
8.2.2.2
Capacitor Selection
8.2.2.3
Interface Selection
8.2.2.4
Power Supply Selection
8.2.3
Application Curves
8.3
Initialization Setup
8.3.1
Initialization Procedure
8.3.2
Typical Usage Examples
8.3.2.1
Play a Waveform or Waveform Sequence from the RAM Waveform Memory
8.3.2.2
Play a Real-Time Playback (RTP) Waveform
8.3.2.3
Play a PWM or Analog Input Waveform
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Trace Width
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YZF|9
MXBG027N
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slos824c_oa
7.3
Feature Description