SLOS740C May   2012  – January 2023 DRV2665

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Support for Haptic Piezo Actuators
      2. 7.3.2  Flexible Front End Interface
      3. 7.3.3  Ramp Down Behavior
      4. 7.3.4  Low Latency Startup
      5. 7.3.5  Low Power Standby Mode
      6. 7.3.6  Device Reset
      7. 7.3.7  Amplifier Gain
      8. 7.3.8  Adjustable Boost Voltage
      9. 7.3.9  Adjustable Current Limit
      10. 7.3.10 Internal Charge Pump
      11. 7.3.11 Device Protection
        1. 7.3.11.1 Thermal Protection
        2. 7.3.11.2 Overcurrent Protection
        3. 7.3.11.3 Brownout Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 FIFO Mode
      2. 7.4.2 Analog Playback Mode
      3. 7.4.3 Low Voltage Operation Mode
    5. 7.5 Programming
      1. 7.5.1 Programming the Boost Voltage
      2. 7.5.2 Programming the Boost Current Limit
      3. 7.5.3 I2C Interface
        1. 7.5.3.1 General I2C Operation
        2. 7.5.3.2 Single-Byte and Multiple-Byte Transfers
        3. 7.5.3.3 Single-Byte Write
        4. 7.5.3.4 Multiple-Byte Write and Incremental Multiple-Byte Write
        5. 7.5.3.5 Single-Byte Read
        6. 7.5.3.6 Multiple-Byte Read
    6. 7.6 Register Map
      1. 7.6.1 Address: 0x00
      2. 7.6.2 Address: 0x01
      3. 7.6.3 Address: 0x02
      4. 7.6.4 Address: 0x0B
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Piezo Actuator Selection
        3. 8.2.2.3 Boost Capacitor Selection
        4. 8.2.2.4 Bulk Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Initialization Setup
      1. 8.3.1 Initialization Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.4 Low Latency Startup

The DRV2665 device features a fast startup time, that is essential for achieving low latency in haptic applications. When the STANDBY bit is transitioned from high to low, the device is ready for operation. The device logic automatically controls the internal boost converter and amplifier enable signals. The boost converter and amplifier are enabled only when needed and otherwise remain in a lower power idle state. When the device received a data byte through the FIFO interface, the boost converter and amplifier wake up and the internal logic sends the first sample through the internal DAC after the wake-up is completed. In the system application, the entire system latency must be kept to less than 30 ms total to be imperceptible to the end user. At a 2-ms wake-up time, the device is a small percentage of the total system latency.

If the EN_OVERRIDE bit is set, the device immediately enters the startup procedure and the boost converter and amplifier remain enabled, bypassing the internal controls. Subsequent transactions occur immediately with no wake-up overhead, but the boost converter and amplifier draw a quiescent current until the EN_OVERRIDE bit is cleared by the user.