SLASF54 January   2023 DRV2901

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Block Diagrams
    2. 7.2 Feature Description
      1. 7.2.1 Error Reporting
      2. 7.2.2 Device Reset
      3. 7.2.3 Device Protection System
        1. 7.2.3.1 Overcurrent (OC) Protection With Current Limiting and Overload Detection
        2. 7.2.3.2 Overtemperature Protection
        3. 7.2.3.3 Undervoltage Protection (UVP) and Power-On Reset (POR)
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
  9. 9 Power Supply Recommendations
    1. 9.1 System Power-up/power-down Sequence
      1. 9.1.1 Powering Up
      2. 9.1.2 Powering Down
    2. 9.2 System Design Recommendations
      1. 9.2.1 VDD Pin
      2. 9.2.2 VREG Pin
      3. 9.2.3 OTW Pin
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.1 Error Reporting

The SD and OTW pins are both active-low, open-drain outputs. Their function is for protection-mode signaling to a PWM controller or other system-control device.

Any fault resulting in device shutdown, such as overtemperatue shut down, overcurrent shut-down, or undervoltage protection, is signaled by the SD pin going low. Likewise, OTW goes low when the device junction temperature exceeds 125°C (see Table 7-1).

Table 7-1 Protection Mode Signal Descriptions
SDOTWDESCRIPTION
00Overtemperature warning and (overtemperature shut down or overcurrent shut down or undervoltage protection) occurred
01Overcurrent shut-down or GVDD undervoltage protection occurred
10Overtemperature warning
11Device under normal operation

TI recommends monitoring the OTW signal using the system microcontroller and responding to an OTW signal by reducing the load current to prevent further heating of the device resulting in device overtemperature shutdown (OTSD).

To reduce external component count, an internal pullup resistor to internal VREG (3.3 V) is provided on both SD and OTW outputs. Level compliance for 5-V logic can be obtained by adding external pullup resistors to 5 V (see the Electrical Characteristics section of this data sheet for further specifications).