SLVSHE3 June   2024 DRV2911-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Auto
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Stage
      2. 6.3.2 Hardware Interface
      3. 6.3.3 AVDD Linear Voltage Regulator
      4. 6.3.4 Step-Down Mixed-Mode Buck Regulator
        1. 6.3.4.1 Buck in Inductor Mode
        2. 6.3.4.2 Buck in Resistor mode
        3. 6.3.4.3 Buck Regulator with External LDO
        4. 6.3.4.4 AVDD Power Sequencing with Buck Regulator
        5. 6.3.4.5 Mixed mode Buck Operation and Control
        6. 6.3.4.6 Buck Undervoltage Lockout
        7. 6.3.4.7 Buck Overcurrent Protection
      5. 6.3.5 Charge Pump
      6. 6.3.6 Slew Rate Control
      7. 6.3.7 Cross Conduction (Dead Time)
      8. 6.3.8 Propagation Delay
      9. 6.3.9 Protections
        1. 6.3.9.1 PVDD Supply Undervoltage Lockout
        2. 6.3.9.2 AVDD Undervoltage Lockout
        3. 6.3.9.3 VCP Charge Pump Undervoltage Lockout
        4. 6.3.9.4 Overcurrent Latched Protection
        5. 6.3.9.5 Thermal Shutdown (OTSD)
          1. 6.3.9.5.1 OTSD FET
          2. 6.3.9.5.2 OTSD (Non-FET)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Functional Modes
        1. 6.4.1.1 Reset Mode
        2. 6.4.1.2 Operating Mode
        3. 6.4.1.3 Fault Reset (RESETZ Pulse)
      2. 6.4.2 OUTOFF functionality
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Procedure
      2. 7.2.2 Voltage and Current Sense Circuitry
  9. 8 Power Supply Recommendations
    1. 8.1 Bulk Capacitance
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Thermal Considerations
      1. 9.3.1 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1: –40°C ≤ TA ≤ 125°C
    • Wettable flank package
  • 2-Channel half bridge driver
    • PWM-inputs for each half bridge control
    • Overcurrent protection
    • Supports up to 200kHz PWM frequency
  • 5V to 35V operating voltage (40V abs max)
  • High output current capability: 8A Peak
  • Low MOSFET on-state resistance
    • 95mΩ (typ.) RDS(ON) (HS + LS) at TA = 25°C
  • Low power sleep mode
    • 2.5µA (max.) at VPVDD = 13.5V, TA = 25°C
  • Supports 1.8V, 3.3V, and 5V logic inputs
  • Built-in 3.3V, 30mA LDO regulator
  • Integrated protection features
    • Supply undervoltage lockout (UVLO)
    • Charge pump undervoltage (CPUV)
    • Overcurrent protection (OCP)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indication pin (FAULTZ)