SBOS988A August   2019  – April 2020 DRV425-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fluxgate Sensor Front-End
        1. 7.3.1.1 Fluxgate Sensor
        2. 7.3.1.2 Bandwidth
        3. 7.3.1.3 Differential Driver for the Internal Compensation Coil
        4. 7.3.1.4 Magnetic Field Range, Overrange Indicator, and Error Flag
      2. 7.3.2 Shunt-Sense Amplifier
      3. 7.3.3 Voltage Reference
      4. 7.3.4 Low-Power Operation
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Linear Position Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Current Sensing in Busbars
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Decoupling
    2. 9.2 Power-On Start-Up and Brownout
    3. 9.3 Power Dissipation
      1. 9.3.1 Thermal Pad
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2 Shunt-Sense Amplifier

The compensation coil current creates a voltage drop across the external shunt resistor, RSHUNT. The internal differential amplifier senses this voltage drop. This differential amplifier offers wide bandwidth and a high slew rate. Excellent dc stability and accuracy result from a chopping technique. The voltage gain is 4 V/V, set by precisely matched and thermally stable internal resistors.

Both the AINN and AINP differential amplifier inputs are connected to the external shunt resistor. This shunt resistor, in series with the internal 10-kΩ input resistors of the shunt-sense amplifier, causes an additional gain error. Therefore, for best common-mode rejection performance, place a dummy shunt resistor (R5) with a value higher than the shunt resistor in series with the REFIN pin to restore the matching of both resistor dividers, as shown in Figure 65.

DRV425-Q1 drv425-internal-difference-amplifier-with-an-example-of-a-decoupling-filter.gifFigure 65. Internal Difference Amplifier With an Example of a Decoupling Filter

For an overall gain of 4 V/V, calculate the value of R5 using Equation 6:

Equation 6. DRV425-Q1 q_r2_r1_sbos693.gif

where

  • R2 / R1 = R4 / R3 = 4.
  • R5 = RSHUNT × 4.

If the input signal is large, the amplifier output drives close to the supply rails. The amplifier output is able to drive the input of a successive approximation register (SAR) analog-to-digital converter (ADC). For best performance, add an RC low-pass filter stage between the shunt-sense amplifier output and the ADC input. This filter limits the noise bandwidth, and decouples the high-frequency sampling noise of the ADC input from the amplifier output. For filter resistor RF and filter capacitor CF values, see the specific converter recommendations in the respective product data sheet.

The shunt-sense amplifier output drives 100 pF directly, and shows a 50% overshoot with a 1-nF capacitance. Filter resistor RF extends the capacitive load range. With an RF of only 20 Ω, the load capacitor must be either less than 1 nF or more than 33 nF to avoid overshoot; with an RF of 50 Ω, this transient area is avoided.

Reference input REFIN is the common-mode voltage node for the output signal VOUT. To use the internal voltage reference of the DRV425-Q1, connect the REFIN pin to the reference output REFOUT. To avoid mismatch errors, use the same reference voltage for REFIN and the ADC. Alternatively, use an ADC with a pseudodifferential input, with the positive input of the ADC connected to VOUT, and the negative input connected to REFIN of the device.