SBOS988A August   2019  – April 2020 DRV425-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fluxgate Sensor Front-End
        1. 7.3.1.1 Fluxgate Sensor
        2. 7.3.1.2 Bandwidth
        3. 7.3.1.3 Differential Driver for the Internal Compensation Coil
        4. 7.3.1.4 Magnetic Field Range, Overrange Indicator, and Error Flag
      2. 7.3.2 Shunt-Sense Amplifier
      3. 7.3.3 Voltage Reference
      4. 7.3.4 Low-Power Operation
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Linear Position Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Current Sensing in Busbars
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Supply Decoupling
    2. 9.2 Power-On Start-Up and Brownout
    3. 9.3 Power Dissipation
      1. 9.3.1 Thermal Pad
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Typical Characteristics

at VDD = 5 V and TA = 25°C (unless otherwise noted)
DRV425-Q1 D001_SBOS704.gif
VDD = 5 V
Figure 1. Fluxgate Sensor Front-End Offset Histogram
DRV425-Q1 D003_SBOS704.gif
Figure 3. Fluxgate Sensor Front-End Offset vs
Supply Voltage
DRV425-Q1 D005_SBOS704.gif
Figure 5. Fluxgate Sensor Front-End Offset Drift Histogram
DRV425-Q1 D008_SBOS729.gif
Figure 7. Fluxgate Sensor Front-End Gain vs
Supply Voltage
DRV425-Q1 D057_SBOS729.gif
Figure 9. Fluxgate Sensor Front-End Linearity Histogram
DRV425-Q1 D011_SBOS729.gif
Figure 11. Fluxgate Sensor Front-End Linearity vs Temperature
DRV425-Q1 D007_SBOS729.gif
VDD = 5 V
Figure 13. Fluxgate Sensor Saturation (ERROR Pin)
Trip Level Histogram
DRV425-Q1 D052_SBOS729.gif
Figure 15. Fluxgate Sensor Saturation (ERROR Pin) Trip Level vs Temperature
DRV425-Q1 D054_SBOS729.gif
Figure 17. Compensation Coil Resistance vs Temperature
DRV425-Q1 D016_SBOS704.gif
VDD = 3.3 V
Figure 19. Shunt-Sense Amplifier Output Offset Histogram
DRV425-Q1 D017_SBOS704.gif
Figure 21. Shunt-Sense Amplifier Output Offset vs Temperature
DRV425-Q1 D020_SBOS704.gif
Figure 23. Shunt-Sense Amplifier CMRR vs
Input Signal Frequency
DRV425-Q1 D022_SBOS704.gif
Figure 25. Shunt-Sense Amplifier PSRR vs
Ripple Frequency
DRV425-Q1 D024_SBOS704.gif
Figure 27. Shunt-Sense Amplifier AINP Input Impedance
vs Temperature
DRV425-Q1 D026_SBOS704.gif
Figure 29. Shunt-Sense Amplifier AINN Input Impedance
vs Temperature
DRV425-Q1 D055_SBOS729.gif
Including IFG, VDD = 3.3 V
Figure 31. Shunt-Sense Amplifier Gain Error Histogram
DRV425-Q1 D029_SBOS704.gif
Figure 33. Shunt-Sense Amplifier Gain vs
Input Signal Frequency
DRV425-Q1 D031_SBOS729.gif
Figure 35. OR Pin Trip Level vs Output Current
DRV425-Q1 D032_SBOS729.gif
Figure 37. OR Pin Trip Level vs Temperature
DRV425-Q1 D035_SBOS704.gif
Figure 39. Shunt-Sense Amplifier Output Short-Circuit Current vs Supply Voltage
DRV425-Q1 D012_SBOS729.gif
Rising edge
Figure 41. Shunt-Sense Amplifier Small-Signal
Settling Time
DRV425-Q1 D050_SBOS729.gif
Rising edge
Figure 43. Shunt-Sense Amplifier Large-Signal
Settling Time
DRV425-Q1 D036_SBOS729.gif
VDD = 5 V
Figure 45. Shunt-Sense Amplifier Overload Recovery Response
DRV425-Q1 D038_SBOS704.gif
Figure 47. Shunt-Sense Amplifier Output Voltage Noise Density vs Noise Frequency
DRV425-Q1 D058_SBOS729.gif
VREFOUT = 1.65 V
Figure 49. Reference Voltage Histogram
DRV425-Q1 D040_SBOS704.gif
Figure 51. Reference Voltage vs Temperature
DRV425-Q1 D041_SBOS704.gif
Figure 53. Reference Voltage Drift Histogram
DRV425-Q1 D045_SBOS704.gif
Figure 55. Reference Voltage Load Regulation Histogram
DRV425-Q1 D061_SBOS729.gif
Figure 57. Quiescent Current vs Supply Voltage
DRV425-Q1 D014_SBOS729.gif
Figure 59. Supply Current vs Magnetic Field
DRV425-Q1 D002_SBOS704.gif
VDD = 3.3 V
Figure 2. Fluxgate Sensor Front-End Offset Histogram
DRV425-Q1 D004_SBOS704.gif
Figure 4. Fluxgate Sensor Front-End Offset vs
Temperature
DRV425-Q1 D046_SBOS729.gif
Figure 6. Fluxgate Sensor Front-End Gain Histogram
DRV425-Q1 D009_SBOS729.gif
Figure 8. Fluxgate Sensor Front-End Gain vs Temperature
DRV425-Q1 D010_SBOS729.gif
Figure 10. Fluxgate Sensor Front-End Linearity vs
Supply Voltage
DRV425-Q1 D006_SBOS704.gif
Figure 12. Fluxgate Sensor Front-End Noise Density vs Noise Frequency
DRV425-Q1 D013_SBOS729.gif
VDD = 3.3 V
Figure 14. Fluxgate Sensor Saturation (ERROR Pin)
Trip Level Histogram
DRV425-Q1 D053_SBOS729.gif
Figure 16. Compensation Coil Resistance Histogram
DRV425-Q1 D015_SBOS704.gif
VDD = 5 V
Figure 18. Shunt-Sense Amplifier Output Offset Histogram
DRV425-Q1 D018_SBOS704.gif
Figure 20. Shunt-Sense Amplifier Output Offset vs
Supply Voltage
DRV425-Q1 D019_SBOS704.gif
Figure 22. Shunt-Sense Amplifier CMRR Histogram
DRV425-Q1 D021_SBOS704.gif
Figure 24. Shunt-Sense Amplifier PSRR Histogram
DRV425-Q1 D023_SBOS704.gif
Figure 26. Shunt-Sense Amplifier AINP Input Impedance Histogram
DRV425-Q1 D025_SBOS704.gif
Figure 28. Shunt-Sense Amplifier AINN Input Impedance Histogram
DRV425-Q1 D027_SBOS704.gif
Including IFG, VDD = 5 V
Figure 30. Shunt-Sense Amplifier Gain Error Histogram
DRV425-Q1 D028_SBOS704.gif
Figure 32. Shunt-Sense Amplifier Gain Error vs
Temperature
DRV425-Q1 D030_SBOS704.gif
Figure 34. Shunt-Sense Amplifier Linearity Error vs
Supply Voltage
DRV425-Q1 D056_SBOS729.gif
Figure 36. OR Pin Trip Level vs Supply Voltage
DRV425-Q1 D033_SBOS704.gif
Figure 38. OR Pin Trip Delay vs Temperature
DRV425-Q1 D034_SBOS704.gif
Figure 40. Shunt-Sense Amplifier Output Short-Circuit Current vs Temperature
DRV425-Q1 D049_SBOS729.gif
Falling edge
Figure 42. Shunt-Sense Amplifier Small-Signal
Settling Time
DRV425-Q1 D051_SBOS729.gif
Falling edge
Figure 44. Shunt-Sense Amplifier Large-Signal
Settling Time
DRV425-Q1 D037_SBOS729.gif
VDD = 3.3 V
Figure 46. Shunt-Sense Amplifier Overload Recovery Response
DRV425-Q1 D039_SBOS729.gif
VREFOUT = 2.5 V
Figure 48. Reference Voltage Histogram
DRV425-Q1 D042_SBOS704.gif
Figure 50. Reference Voltage vs Supply Voltage
DRV425-Q1 D043_SBOS704.gif
Figure 52. Reference Voltage vs Reference Output Current
DRV425-Q1 D044_SBOS704.gif
Figure 54. Reference Voltage PSRR Histogram
DRV425-Q1 D060_SBOS729.gif
Figure 56. Reference Short-Circuit Current vs Temperature
DRV425-Q1 D048_SBOS729.gif
Figure 58. Quiescent Current vs Temperature
DRV425-Q1 D047_SBOS704.gif
Figure 60. Power-On Reset Threshold vs Temperature