SBAS913 December   2018 DRV5021

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Schematic
      2.      Magnetic Response
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Magnetic Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Field Direction Definition
      2. 7.3.2 Device Output
      3. 7.3.3 Power-On Time
      4. 7.3.4 Hall Element Location
      5. 7.3.5 Propagation Delay
      6. 7.3.6 Output Stage
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Proximity Sensing Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Configuration Example
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Alternative Two-Wire Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6 Output Stage

The DRV5021 output stage uses an open-drain NMOS transistor that is rated to sink up to 20 mA of current. For proper operation, calculate the value of pullup resistor R1 using Equation 1.

Equation 1. DRV5021 drv5021-equation-1.gif

The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current is generally better; however, faster transitions and bandwidth require a smaller resistor for faster switching.

In addition, the value of R1 must be > 500 Ω in order to make sure that the output driver can pull the OUT pin close to GND.

NOTE

Vref is not restricted to VCC. The allowable voltage range of this pin is specified in the Recommended Operating Conditions.

DRV5021 drv5021-open-drain-output.gifFigure 19. Open-Drain Output

Select a value for C2 based on the system bandwidth specifications shown in Equation 2.

Equation 2. DRV5021 eq_02_slis150.gif

Most applications do not require this C2 filtering capacitor.