The DRV5023 device is a chopper-stabilized Hall Effect Sensor that offers a magnetic sensing solution with superior sensitivity stability over temperature and integrated protection features.
When the applied magnetic flux density exceeds the BOP threshold, the DRV5023 open-drain output goes low. The output stays low until the field decreases to less than BRP, and then the output goes to high impedance. The output current sink capability is 30 mA. A wide operating voltage range from 2.5 to 38 V with reverse polarity protection up to –22 V makes the device suitable for a wide range of industrial applications.
Internal protection functions are provided for reverse supply conditions, load dump, and output short circuit or over current.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DRV5023 | SOT-23 (3) | 2.92 mm × 1.30 mm |
TO-92 (3) | 4.00 mm × 3.15 mm |
Changes from F Revision (May 2016) to G Revision
Changes from E Revision (February 2016) to F Revision
Changes from D Revision (December 2015) to E Revision
Changes from C Revision (May 2015) to D Revision
Changes from B Revision (September 2014) to C Revision
Changes from A Revision (August 2014) to B Revision
Changes from * Revision (May 2014) to A Revision
For additional configuration information, see Device Markings and Mechanical, Packaging, and Orderable Information.
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | DBZ | LPG | ||
GND | 3 | 2 | GND | Ground pin |
OUT | 2 | 3 | Output | Hall sensor open-drain output. The open drain requires a resistor pullup. |
VCC | 1 | 1 | Power | 2.5 to 38 V power supply. Bypass this pin to the GND pin with a 0.01-μF (minimum) ceramic capacitor rated for VCC. |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Power supply voltage | VCC | –22(2) | 40 | V | |
Voltage ramp rate (VCC), VCC < 5 V | Unlimited | V/µs | |||
Voltage ramp rate (VCC), VCC > 5 V | 0 | 2 | |||
Output pin voltage | –0.5 | 40 | V | ||
Output pin reverse current during reverse supply condition | 0 | 100 | mA | ||
Magnetic flux density, BMAX | Unlimited | ||||
Operating junction temperature, TJ | –40 | 150 | °C | ||
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2500 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Power supply voltage | 2.5 | 38 | V | |
VO | Output pin voltage (OUT) | 0 | 38 | V | |
ISINK | Output pin current sink (OUT)(1) | 0 | 30 | mA | |
TA | Operating ambient temperature | –40 | 125 | °C |
THERMAL METRIC(1) | DRV5023 | UNIT | ||
---|---|---|---|---|
DBZ (SOT-23) | LPG (TO-92) | |||
3 PINS | 3 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 333.2 | 180 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 99.9 | 98.6 | °C/W |
RθJB | Junction-to-board thermal resistance | 66.9 | 154.9 | °C/W |
ψJT | Junction-to-top characterization parameter | 4.9 | 40 | °C/W |
ψJB | Junction-to-board characterization parameter | 65.2 | 154.9 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT(1) | |
---|---|---|---|---|---|---|
ƒBW | Bandwidth(2) | 20 | 30 | kHz | ||
DRV5023FA: 3.5 / 2 mT | ||||||
BOP | Operate point (see Figure 12) | TA = –40°C to 125°C | 1.8 | 3.5 | 6.8 | mT |
BRP | Release point (see Figure 12) | 0.5 | 2 | 4.2 | mT | |
Bhys | Hysteresis; Bhys= (BOP – BRP) | 1.5 | mT | |||
BO | Magnetic offset, BO = (BOP + BRP) / 2 | 2.8 | mT | |||
DRV5023AJ: 6.9 / 3.2 mT | ||||||
BOP | Operate point (see Figure 12) | TA = –40°C to 125°C | 3 | 6.9 | 12 | mT |
BRP | Release point (see Figure 12) | 1 | 3.2 | 5 | mT | |
Bhys | Hysteresis; Bhys= (BOP – BRP) | 3.7 | mT | |||
BO | Magnetic offset, BO = (BOP + BRP) / 2 | 5 | mT | |||
DRV5023BI: 14.5 / 6 mT | ||||||
BOP | Operate point (see Figure 12) | TA = –40°C to 125°C | 6 | 14.5 | 24 | mT |
BRP | Release point (see Figure 12) | 3 | 6 | 9 | mT | |
Bhys | Hysteresis; Bhys = (BOP – BRP)(3) | 8.5 | mT | |||
BO | Magnetic offset, BO = (BOP + BRP) / 2 | 10.3 | mT |
TA = 25°C | ||
TA = 25°C |
TA = 25°C | ||
TA = 25°C | ||
VCC = 3.3 V | ||
VCC = 3.3 V |
VCC = 3.3 V | ||
VCC = 3.3 V | ||
The DRV5023 device is a chopper-stabilized Hall sensor with a digital output for magnetic sensing applications. The DRV5023 device can be powered with a supply voltage between 2.5 and 38 V, and will survive –22 V reverse-battery conditions. The DRV5023 device does not operate when –22 to 2.4 V is applied to the VCC pin (with respect to GND pin). In addition, the device can withstand supply voltages up to 40 V for transient durations.
The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic field. A north pole near the marked side of the package is a negative magnetic field.
The output state is dependent on the magnetic field perpendicular to the package. A strong south pole near the marked side of the package causes the output to pull low (operate point, BOP), and a weak south pole causes the output to release (release point, BRP). Hysteresis is included in between the operate point and the release point therefore magnetic-field noise does not accidentally trip the output.
An external pullup resistor is required on the OUT pin. The OUT pin can be pulled up to VCC, or to a different voltage supply. This allows for easier interfacing with controller circuits.
A positive magnetic field is defined as a south pole near the marked side of the package as shown in Figure 11.
If the device is powered on with a magnetic field strength between BRP and BOP, then the device output is indeterminate and can either be Hi-Z or Low. For the FA, AJ, and BI device versions, if the field strength is greater than BOP, then the output is pulled low; if the field strength is less than BRP, then the output is released. For the FI device version, if the field strength is greater than BOP, then the output is Hi-Z; if the field strength is less than BRP, then the output is pulled Low.
After applying VCC to the DRV5023 device, ton must elapse before the OUT pin is valid. During the power-up sequence, the output is Hi-Z. A pulse as shown in Figure 13 and Figure 14 occurs at the end of ton. This pulse can allow the host processor to determine when the DRV5023 output is valid after startup. In Case 1 (Figure 13) and Case 2 (Figure 14), the output is defined assuming a constant magnetic field B > BOP and B < BRP.
If the device is powered on with the magnetic field strength BRP < B < BOP, then the device output is indeterminate and can either be Hi-Z or pulled low. During the power-up sequence, the output is held Hi-Z until ton has elapsed. At the end of ton, a pulse is given on the OUT pin to indicate that ton has elapsed. After ton, if the magnetic field changes such that BOP < B, the output is released. Case 3 (Figure 15) and Case 4 (Figure 16) show examples of this behavior.
The DRV5023 output stage uses an open-drain NMOS, and it is rated to sink up to 30 mA of current. For proper operation, calculate the value of the pullup resistor R1 using Equation 1.
The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current is generally better, however faster transitions and bandwidth require a smaller resistor for faster switching.
In addition, ensure that the value of R1 > 500 Ω to ensure the output driver can pull the OUT pin close to GND.
NOTE
Vref is not restricted to VCC. The allowable voltage range of this pin is specified in the Absolute Maximum Ratings.
Select a value for C2 based on the system bandwidth specifications as shown in Equation 2.
Most applications do no require this C2 filtering capacitor.
The DRV5023 device is fully protected against overcurrent and reverse-supply conditions.
An analog current-limit circuit limits the current through the FET. The driver current is clamped to IOCP. During this clamping, the rDS(on) of the output FET is increased from the nominal value.
The DRV5023 device operates at DC VCC conditions up to 38 V nominally, and can additionally withstand VCC = 40 V. No current-limiting series resistor is required for this protection.
The DRV5023 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V).
NOTE
In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings specified in the Absolute Maximum Ratings.
FAULT | CONDITION | DEVICE | DESCRIPTION | RECOVERY |
---|---|---|---|---|
FET overload (OCP) | ISINK ≥ IOCP | Operating | Output current is clamped to IOCP | IO < IOCP |
Load dump | 38 V < VCC < 40 V | Operating | Device will operate for a transient duration | VCC ≤ 38 V |
Reverse supply | –22 V < VCC < 0 V | Disabled | Device will survive this condition | VCC ≥ 2.5 V |
The DRV5023 device is active only when VCC is between 2.5 and 38 V.
When a reverse supply condition exists, the device is inactive.