SLVSGJ9 May   2024 DRV7308

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Absolute Maximum Ratings
  7. 6 ESD Ratings
  8. 7 Recommended Operating Conditions
  9. 8 Thermal Information
  10. 9 Electrical Characteristics
  11. 10Timing Diagrams
  12. 11Typical Characteristics
  13. 12Detailed Description
    1. 12.1 Overview
    2. 12.2 Functional Block Diagram
    3. 12.3 Feature Description
      1. 12.3.1 Output Stage
      2. 12.3.2 Input Control Logic
      3. 12.3.3 ENABLE (EN) Pin Function
      4. 12.3.4 Temperature Sensor Output (VTEMP)
      5. 12.3.5 Brake Function
      6. 12.3.6 Slew Rate Control (SR)
      7. 12.3.7 Dead Time
      8. 12.3.8 Current Limit Functionaity (ILIMIT)
      9. 12.3.9 Pin Diagrams
        1. 12.3.9.1 Four-Level Input Pin
        2. 12.3.9.2 Open-Drain Pin
        3. 12.3.9.3 Logic-Level Input Pin (Internal Pulldown)
    4. 12.4 Protections
      1. 12.4.1 GVDD Undervoltage Lockout
      2. 12.4.2 Bootstrap Undervoltage Lockout
      3. 12.4.3 Current Limit Protection
      4. 12.4.4 GaNFET Overcurrent Protection
      5. 12.4.5 Thermal Shutdown (OTS)
  14. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  15. 14Revision History
  16. 15Mechanical, Packaging, and Orderable Information
    1. 15.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • REN|68
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12.4.3 Current Limit Protection

The DRV7308 integrates three comparators to protect the device, and external motor load, due to overload scenarios. DRV7308 has three integrated comparators, each monitoring voltage at SLA, SLB, and SLC pins separately. A voltage less than 2V at the ILIMIT pin enables the current limit circuitry and when the SLx voltage goes beyond the ILIMIT pin voltage, the device turns off all GaNFETs for a time tFCLR. The GaNFETs turn on again after tFCLR time elapses, depending on the status of input control signals. The current limit is reported by driving the HV_nFAULT pin low.

DRV7308 Current Limit Operation Figure 12-8 Current Limit Operation