SLVSH22 May   2024 DRV8000-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings Auto
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information RGZ package
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 External Components
    4. 7.4 Feature Description
      1. 7.4.1 Heater MOSFET Driver
        1. 7.4.1.1 Heater MOSFET Driver Control
        2. 7.4.1.2 Heater MOSFET Driver Protection
          1. 7.4.1.2.1 Heater SH_HS Internal Diode
          2. 7.4.1.2.2 Heater MOSFET VDS Overcurrent Protection (HEAT_VDS)
          3. 7.4.1.2.3 Heater MOSFET Open Load Detection
      2. 7.4.2 High-side Drivers
        1. 7.4.2.1 High-side Driver Control
          1. 7.4.2.1.1 High-side Driver PWM Generator
          2. 7.4.2.1.2 Constant Current Mode
          3. 7.4.2.1.3 OUT7 HS ITRIP Behavior
          4. 7.4.2.1.4 High-side Drivers - Parallel Outputs
        2. 7.4.2.2 High-side Driver Protection Circuits
          1. 7.4.2.2.1 High-side Drivers Internal Diode
          2. 7.4.2.2.2 High-side Driver Over Current Protection
          3. 7.4.2.2.3 High-side Driver Open Load Detection
      3. 7.4.3 Electro-chromic Glass Driver
        1. 7.4.3.1 Electro-chromic Driver Control
        2. 7.4.3.2 Electro-chromic Driver Protection
      4. 7.4.4 Half-bridge Drivers
        1. 7.4.4.1 Half-bridge Control
        2. 7.4.4.2 Half-bridge ITRIP Regulation
        3. 7.4.4.3 Half-bridge Protection and Diagnostics
          1. 7.4.4.3.1 Half-bridge Off-State Diagnostics (OLP)
          2. 7.4.4.3.2 Half-Bridge Active Open Load Detection (OLA)
          3. 7.4.4.3.3 Half-Bridge Over-Current Protection
      5. 7.4.5 Gate Drivers
        1. 7.4.5.1 Input PWM Modes
          1. 7.4.5.1.1 Half-Bridge Control
          2. 7.4.5.1.2 H-Bridge Control
          3. 7.4.5.1.3 DRVOFF - Gate Driver Shutoff Pin
        2. 7.4.5.2 Smart Gate Driver - Functional Block Diagram
          1. 7.4.5.2.1  Smart Gate Driver
          2. 7.4.5.2.2  Functional Block Diagram
          3. 7.4.5.2.3  Slew Rate Control (IDRIVE)
          4. 7.4.5.2.4  Gate Driver State Machine (TDRIVE)
            1. 7.4.5.2.4.1 tDRIVE Calculation Example
          5. 7.4.5.2.5  Propagation Delay Reduction (PDR)
          6. 7.4.5.2.6  PDR Pre-Charge/Pre-Discharge Control Loop Operation Details
            1. 7.4.5.2.6.1 PDR Pre-Charge/Pre-Discharge Setup
          7. 7.4.5.2.7  PDR Post-Charge/Post-Discharge Control Loop Operation Details
            1. 7.4.5.2.7.1 PDR Post-Charge/Post-Discharge Setup
          8. 7.4.5.2.8  Detecting Drive and Freewheel MOSFET
          9. 7.4.5.2.9  Automatic Duty Cycle Compensation (DCC)
          10. 7.4.5.2.10 Closed Loop Slew Time Control (STC)
            1. 7.4.5.2.10.1 STC Control Loop Setup
        3. 7.4.5.3 Tripler (Double-Stage) Charge Pump
        4. 7.4.5.4 Wide Common Mode Differential Current Shunt Amplifier
        5. 7.4.5.5 Gate Driver Protection Circuits
          1. 7.4.5.5.1 MOSFET VDS Overcurrent Protection (VDS_OCP)
          2. 7.4.5.5.2 Gate Driver Fault (VGS_GDF)
          3. 7.4.5.5.3 Offline Short Circuit and Open Load Detection (OOL and OSC)
      6. 7.4.6 Sense Output (IPROPI)
      7. 7.4.7 Protection Circuits
        1. 7.4.7.1 Fault Reset (CLR_FLT)
        2. 7.4.7.2 DVDD Logic Supply Power on Reset (DVDD_POR)
        3. 7.4.7.3 PVDD Supply Undervoltage Monitor (PVDD_UV)
        4. 7.4.7.4 PVDD Supply Overvoltage Monitor (PVDD_OV)
        5. 7.4.7.5 VCP Charge Pump Undervoltage Lockout (VCP_UV)
        6. 7.4.7.6 Thermal Clusters
        7. 7.4.7.7 Watchdog Timer
        8. 7.4.7.8 Fault Detection and Response Summary Table
    5. 7.5 Programming
      1. 7.5.1 SPI Interface
      2. 7.5.2 SPI Format
      3. 7.5.3 Timing Diagrams
  9. 8  DRV8000-Q1 Register Map
  10. 9 DRV8000-Q1_STATUS Registers
  11. 10DRV8000-Q1_CNFG Registers
  12. 11DRV8000-Q1_CTRL Registers
  13. 12Application and Implementation
    1. 12.1 Application Information
    2. 12.2 Typical Application
      1. 12.2.1 Design Requirements
    3. 12.3 Initialization Setup
    4. 12.4 Power Supply Recommendations
      1. 12.4.1 Bulk Capacitance Sizing
    5. 12.5 Layout
      1. 12.5.1 Layout Guidelines
      2. 12.5.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  15. 14Revision History
  16. 15Mechanical, Packaging, and Orderable Information
    1. 15.1 Package Option Addendum
    2. 15.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 DRV8000-Q1 Register Map

DRV8000-Q1 Register Map lists the memory-mapped registers for the DRV8000-Q1. All register addresses not listed should be considered as reserved locations and the register contents should not be modified. Descriptions of reserved locations are provided for reference only. The device ID table summarizes the device IDs for DRV800x devices.

Table 8-1 Device ID Summary
Device Device ID
DRV8000-Q1 Reg Address 0x8h, DEVICE_ID=0x01
DRV8001-Q1 Reg Address 0x8h, DEVICE_ID=0x11
DRV8002-Q1 Reg Address 0x8h, DEVICE_ID=0x01
Table 8-2 DRV8000-Q1 Register Map
Name 15 14 13 12 11 10 9 8 Type Addr
7 6 5 4 3 2 1 0
IC_STAT1 SPI_OK POR FAULT WARN GD HB EC_HEAT HS R 00h
PVDD_UV PVDD_OV VCP_UV OTW OTSD WD_FLT ITRIP OUT7_ITRIP_TO
IC_STAT2 PARITY RSVD SCLK_FLT RSVD ZONE4_OTSD ZONE3_OTSD ZONE2_OTSD ZONE1_OTSD R 01h
ZONE4_OTW_H ZONE3_OTW_H ZONE2_OTW_H ZONE1_OTW_H ZONE4_OTW_L ZONE3_OTW_L ZONE2_OTW_L ZONE1_OTW_L
GD_STAT DRVOFF_STAT RSVD STC_WARN_R STC_WARN_F PCHR_WARN PDCHR_WARN IDIR_WARN IDIR R 02h
VGS_L2 VGS_H2 VGS_L1 VGS_H1 VDS_L2 VDS_H2 VDS_L1 VDS_H1
HB_STAT1 RSVD OUT6_LS_OCP OUT5_LS_OCP OUT4_LS_OCP OUT3_LS_OCP OUT2_LS_OCP OUT1_LS_OCP R 03h
RSVD OUT6_HS_OCP OUT5_HS_OCP OUT4_HS_OCP OUT3_HS_OCP OUT2_HS_OCP OUT1_HS_OCP
HB_STAT2 RSVD HB_OLP_STAT R 04h
RSVD OUT6_OLA OUT5_OLA OUT4_OLA OUT3_OLA OUT2_OLA OUT1_OLA
EC_HEAT_ITRIP_STAT ECFB_UV ECFB_OV ECFB_HI ECFB_LO ECFB_OC ECFB_OL HEAT_OL HEAT_VDS R 05h
OUT7_ITRIP_TO OUT7_ITRIP_STAT OUT6_ITRIP_STAT OUT5_ITRIP_STAT OUT4_ITRIP_STAT OUT3_ITRIP_STAT OUT2_ITRIP_STAT OUT1_ITRIP_STAT
HS_STAT RSVD OUT12_OLA OUT11_OLA OUT10_OLA OUT9_OLA OUT8_OLA OUT7_OLA R 06h
RSVD OUT12_OCP OUT11_OCP OUT10_OCP OUT9_OCP OUT8_OCP OUT7_OCP
SPARE_STAT1 RSVD R 07h
SPARE_STAT2 RSVD R 08h
DEVICE_ID
IC_CNFG1 OTSD_MODE DIS_CP PVDD_OV_MODE PVDD_OV_DG PVD_OV_LVL VCP_UV_LVL R/W 09h
CP_MODE VCP_UV_MODE PVDD_UV_MODE WD_EN WD_FLT_M WD_WIN EN_SSC
IC_CNFG2 RSVD R/W 0Ah
ZONE4_OTW_H_DIS ZONE3_OTW_H_DIS ZONE2_OTW_H_DIS ZONE1_OTW_H_DIS ZONE4_OTW_L_DIS ZONE3_OTW_L_DIS ZONE2_OTW_L_DIS ZONE1_OTW_L_DIS
GD_CNFG RSVD IDRV_LO1 IDRV_LO2 PU_SH_1 PD_SH_1 PU_SH_2 PD_SH_2 R/W 0Bh
RSVD IN2_MODE IN1_MODE BRG_FW BRG_MODE EN_OLSC EN_GD
GD_IDRV_CNFG IDRVP_1 IDRVN_1 R/W 0Ch
IDRVP_2 IDRVN_2
GD_VGS_CNFG RSVD VGS_IND VGS_TDEAD RSVD R/W 0Dh
RSVD VGS_TDRV VGS_HS_DIS VGS_LVL VGS_MODE
GD_VDS_CNFG RSVD VDS_IND VDS_IDRVN VDS_LVL_1 R/W 0Eh
VDS_MODE VDS_DG VDS_LVL_2
GD_CSA_CNFG RSVD R/W 0Fh
CSA_BLK CSA_BLK_SEL CSA_GAIN CSA_DIV CSA_SH_EN
GD_AGD_CNFG RVSD PDR_ERR AGD_ISTRONG AGD_THR SET_AGD FW_MAX R/W 10h
EN_DCC IDIR_MAN KP_PST EN_PST_DLY KP_PDR EN_PDR
GD_PDR_CNFG PRE_MAX T_DON_DOFF R/W 11h
T_PRE_CHR T_PRE_DCHR PRE_CHR_INIT PRE_DCHR_INIT
GD_STC_CNFG RSVD IDIR_MAN_SEL R/W 12h
T_RISE_FALL STC_ERR KP_STC EN_STC
GD_SPARE_CNFG1 RSVD R/W 13h
HB_ITRIP_DG RSVD OUT6_ITRIP_DG OUT5_ITRIP_DG R/W 14h
OUT4_ITRIP_DG OUT3_ITRIP_DG OUT2_ITRIP_DG OUT1_ITRIP_DG
HB_OUT_CNFG1 RSVD NSR_OUT6_DIS NSR_OUT5_DIS NSR_OUT4_DIS NSR_OUT3_DIS NSR_OUT2_DIS NSR_OUT1_DIS IPROPI_SH_EN R/W 15h
RSVD OUT6_CNFG OUT5_CNFG
HB_OUT_CNFG2 RSVD OUT3_CNFG OUT4_CNFG R/W 16h
RSVD OUT2_CNFG OUT1_CNFG
HB_OCP_CNFG RSVD OUT6_OCP_DG OUT5_OCP_DG R/W 17h
OUT4_OCP_DG OUT3_OCP_DG OUT2_OCP_DG OUT1_OCP_DG
HB_OL_CNFG1 RSVD HB_OLP_CNFG HB_OLP_SEL R/W 18h
RSVD OUT6_OLA_EN OUT5_OLA_EN OUT4_OLA_EN OUT3_OLA_EN OUT2_OLA_EN OUT1_OLA_EN
HB_OL_CNFG2 RSVD R/W 19h
RSVD OUT6_OLA_TH OUT5_OLA_TH OUT4_OLA_TH OUT3_OLA_TH OUT2_OLA_TH OUT1_OLA_TH
HB_SR_CNFG RSVD OUT6_SR OUT5_SR R/W 1Ah
OUT4_SR OUT3_SR OUT2_SR OUT1_SR
HB_ITRIP_CNFG OUT6_ITRIP_EN OUT5_ITRIP_EN OUT4_ITRIP_EN OUT3_ITRIP_EN OUT2_ITRIP_EN OUT1_ITRIP_EN OUT6_ITRIP_LVL R/W 1Bh
OUT5_ITRIP_LVL OUT4_ITRIP_LVL OUT3_ITRIP_LVL OUT2_ITRIP_LVL OUT1_ITRIP_LVL
HB_ITRIP_FREQ RSVD OUT6_ITRIP_FREQ OUT5_ITRIP_FREQ R/W 1Ch
OUT4_ITRIP_FREQ OUT3_ITRIP_FREQ OUT2_ITRIP_FREQ OUT1_ITRIP_FREQ
HS_HEAT_OUT_CNFG HEAT_OUT_CNFG RSVD OUT12_CNFG OUT11_CNFG R/W 1Dh
OUT10_CNFG OUT9_CNFG OUT8_CNFG OUT7_CNFG
HS_OC_CNFG RSVD OUT11_EC_MODE RSVD R/W 1Eh
RSVD RSVD OUT12_OC_TH OUT11_OC_TH OUT10_OC_TH OUT9_OC_TH OUT8_OC_TH OUT7_RDSON_MODE
HS_OL_CNFG RSVD RSVD OUT12_OLA_TH OUT11_OLA_TH OUT10_OLA_TH OUT9_OLA_TH OUT8_OLA_TH OUT7_OLA_TH R/W 1Fh
RSVD RSVD OUT12_OLA_EN OUT11_OLA_EN OUT10_OLA_EN OUT9_OLA_EN OUT8_OLA_EN OUT7_OLA_EN
HS_REG_CNFG1 RSVD OUT7_OCP_DIS ITRIP_TO_SEL R/W 20h
OUT7_ITRIP_CNFG OUT7_ITRIP_BLK OUT7_ITRIP_FREQ OUT7_ITRIP_DG
HS_REG_CNFG2 RSVD RSVD OUT12_CCM_TO OUT11_CCM_TO OUT10_CCM_TO OUT9_CCM_TO OUT8_CCM_TO OUT7_CCM_TO R/W 21h
RSVD RSVD OUT12_CCM_EN OUT11_CCM_EN OUT10_CCM_EN OUT9_CCM_EN OUT8_CCM_EN OUT7_CCM_EN
HS_PWM_FREQ_CNFG RSVD RSVD PWM_OUT12_FREQ PWM_OUT11_FREQ R/W 22h
PWM_OUT10_FREQ PWM_OUT9_FREQ PWM_OUT8_FREQ PWM_OUT7_FREQ
HEAT_CNFG RSVD HEAT_VDS_LVL R/W 23h
HEAT_VDS_MODE HEAT_VDS_BLK HEAT_VDS_DG HEAT_OLP_EN RSVD
EC_CNFG ECDRV_OL_EN ECFB_UV_TH RSVD ECFB_UV_DG ECFB_OV_DG R/W 24h
ECFB_UV_MODE ECFB_OV_MODE EC_FLT_MODE ECFB_LS_PWM EC_OLEN ECFB_MAX
HS_OCP_DG RSVD OUT12_OCP_DG OUT11_OCP_DG R/W 25h
OUT10_OCP_DG OUT9_OCP_DG OUT8_OCP_DG OUT7_OCP_DG
SPARE_CNFG2 RSVD R/W 26h
SPARE_CNFG3 RSVD R/W 27h
SPARE_CNFG4 RSVD R/W 28h
IC_CTRL RSVD IPROPI_MODE IPROPI_SEL R/W 29h
CTRL_LOCK CNFG_LOCK WD_RST CLR_FLT
GD_HB_CTRL S_HIZ2 S_HIZ1 S_IN2 S_IN1 OUT6_CTRL OUT5_CTRL R/W 2Ah
OUT4_CTRL OUT3_CTRL OUT2_CTRL OUT1_CTRL
HS_EC_HEAT_CTRL ECFB_LS_EN EC_ON EC_V_TAR R/W 2Bh
HEAT_EN RSVD OUT12_EN OUT11_EN OUT10_EN OUT9_EN OUT8_EN OUT7_EN
OUT7_PWM_DC RSVD OUT7_DC R/W 2Ch
OUT7_DC
OUT8_PWM_DC RSVD OUT8_DC R/W 2Dh
OUT8_DC
OUT9_PWM_DC RSVD OUT9_DC R/W 2Eh
OUT9_DC
OUT10_PWM_DC RSVD OUT10_DC R/W 2Fh
OUT10_DC
OUT11_PWM_DC RSVD OUT11_DC R/W 30h
OUT11_DC
OUT12_PWM_DC RSVD OUT12_DC R/W 31h
OUT12_DC