SLLSFA9B July 2020 – June 2021 DRV8106-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
tSCLK | SCLK minimum period | 100 | ns | ||
tSCLKH | SCLK minimum high time | 50 | ns | ||
tSCLKL | SCLK minimum low time | 50 | ns | ||
tSU_SDI | SDI input data setup time | 25 | ns | ||
tH_SDI | SDI input data hold time | 25 | ns | ||
tD_SDO | SDO output data delay time, CL = 20 pF | 30 | ns | ||
tSU_nSCS | nSCS input setup time | 25 | ns | ||
tH_nSCS | nSCS input hold time | 25 | ns | ||
tHI_nSCS | nSCS minimum high time | 450 | ns | ||
tEN_nSCS | Enable delay time, nSCS low to SDO active | 50 | ns | ||
tDIS_nSCS | Disable delay time, nSCS high to SDO hi-Z | 50 | ns |