SLVSG63A January 2023 – March 2024 DRV8143-Q1
PRODUCTION DATA
MIN | MAX | UNIT | ||
---|---|---|---|---|
Power supply pin voltage | VM | –0.3(3) | 40 | V |
Power supply transient voltage ramp | VM | 2 | V/µs | |
Charge pump pin voltage | VCP | VVM – 0.3 | VVM + 7 | V |
Output pin voltage | OUT | -0.9 | VVM + 0.9 | V |
Output pin current | OUT | Internally limited(2) | A | |
Driver disable pin voltage | DRVOFF | –0.3 | 40 | V |
Logic I/O voltage | IN, nFAULT | –0.3 | 5.75 | V |
HW variant - Configuration pins voltage | ITRIP, SR, DIAG | –0.3 | 5.75 | V |
Analog feedback pin voltage | IPROPI | –0.3 | 5.75 | V |
Sleep pin voltage (Not applicable for SPI (P) variant) | nSLEEP | –0.3 | 40 | V |
SPI I/O voltage - SPI variant | SDI, SDO, nSCS, SCLK | –0.3 | 5.75 | V |
SPI (P) variant - Logic supply | VDD | -0.3 | 5.75 | V |
SPI (P) variant - Logic supply transient voltage ramp | VDD | 5 | V/µs | |
Ambient temperature, TA | –40 | 125 | °C | |
Junction temperature, TJ | –40 | 150 | °C | |
Storage temperature, Tstg | –65 | 150 | °C |