SLVSFZ0A
June 2021 – July 2021
DRV8212P
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
External Components
8.3.2
Control Modes
8.3.2.1
PWM Control
8.3.3
Protection Circuits
8.3.3.1
Supply Undervoltage Lockout (UVLO)
8.3.3.2
OUTx Overcurrent Protection (OCP)
8.3.3.3
Thermal Shutdown (TSD)
8.3.4
Pin Diagrams
8.3.4.1
Logic-Level Inputs
8.4
Device Functional Modes
8.4.1
Active Mode
8.4.2
Low-Power Sleep Mode
8.4.3
Fault Mode
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Full-Bridge Driving
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Supply Voltage
9.2.1.2.2
Control Interface
9.2.1.2.3
Low-Power Operation
9.2.1.3
Application Curves
9.2.2
Dual-Coil Relay Driving
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.2.1
Supply Voltage
9.2.2.2.2
Control Interface
9.2.2.2.3
Low-Power Operation
9.2.2.3
Application Curves
9.2.3
Current Sense
9.2.3.1
Design Requirements
9.2.3.2
Detailed Design Procedure
9.2.3.2.1
Shunt Resistor Sizing
9.3
Current Capability and Thermal Performance
9.3.1
Power Dissipation and Output Current Capability
9.3.2
Thermal Performance
9.3.2.1
Steady-State Thermal Performance
9.3.2.2
Transient Thermal Performance
10
Power Supply Recommendations
10.1
Bulk Capacitance
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DSG|8
MPDS308C
Thermal pad, mechanical data (Package|Pins)
DSG|8
QFND141I
Orderable Information
slvsfz0a_oa
9.2.1.2
Detailed Design Procedure