SLVSH04 November 2023 DRV8214
PRODUCTION DATA
After the supply voltage on the VCC pin has crossed the rising undervoltage threshold VUVLO, if nSLEEP is logic high and tWAKE has elapsed, and if the EN_OUT bit is 1b, the device enters active mode. In this mode, the full-bridge, and internal logic are active and the device is ready to receive inputs.
When VVCC < VVM, the DRV8214 draws active current from the VM pin rather than the VCC pin (IVM). During this operating condition, IVCC is typically less than 500 nA. When VVCC > VVM, the device draws active current from the VCC pin, and the VM pin will only draw current required by the load. When VVCC = VVM, the active current may be drawn from either supply pin. The active current is typically less than 2 mA.