SLVSFU5B February 2020 – August 2021 DRV8220
PRODUCTION DATA
Figure 8-5 shows the input structure for the tri-level input pin, MODE. The MODE pin references its input state to the voltage of the nSLEEP pin to determine logic high, logic low, or high-impedance (Hi-Z) input states. However, these internal resistors do not draw current from the sleep pin when the device is in autosleep mode. This helps to reduce overall current draw from the device when in sleep mode.