SLVSHO3 April   2024 DRV8235

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Operating Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 External Components
      2. 7.3.2 Summary of Features
      3. 7.3.3 Bridge Control
      4. 7.3.4 Current Sense and Regulation (IPROPI)
        1. 7.3.4.1 Current Sensing
        2. 7.3.4.2 Current Regulation
          1. 7.3.4.2.1 Fixed Off-Time Current Regulation
          2. 7.3.4.2.2 Cycle-By-Cycle Current Regulation
      5. 7.3.5 Stall Detection
      6. 7.3.6 Motor Voltage and Speed Regulation
        1. 7.3.6.1 Internal Bridge Control
        2. 7.3.6.2 Setting Speed/Voltage Regulation Parameters
          1. 7.3.6.2.1 Speed and Voltage Set
          2. 7.3.6.2.2 Speed Scaling Factor
            1. 7.3.6.2.2.1 Target Speed Setting Example
          3. 7.3.6.2.3 Motor Resistance Inverse
          4. 7.3.6.2.4 Motor Resistance Inverse Scale
          5. 7.3.6.2.5 KMC Scaling Factor
          6. 7.3.6.2.6 KMC
          7. 7.3.6.2.7 VSNS_SEL
        3. 7.3.6.3 Soft-Start and Soft-Stop
          1. 7.3.6.3.1 TINRUSH
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 Overcurrent Protection (OCP)
        2. 7.3.7.2 Thermal Shutdown (TSD)
        3. 7.3.7.3 VM Undervoltage Lockout (VM UVLO)
        4. 7.3.7.4 Overvoltage Protection (OVP)
        5. 7.3.7.5 nFAULT Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Low-Power Sleep Mode
      3. 7.4.3 Fault Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Communication
        1. 7.5.1.1 I2C Write
        2. 7.5.1.2 I2C Read
  9. 8 Register Map
    1. 8.1 DRV8235_STATUS Registers
    2. 8.2 DRV8235_CONFIG Registers
    3. 8.3 DRV8235_CTRL Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Brushed DC Motor
      1. 9.2.1 Design Requirements
      2. 9.2.2 Stall Detection
        1. 9.2.2.1 Application Description
          1. 9.2.2.1.1 Stall Detection Timing
          2. 9.2.2.1.2 Hardware Stall Threshold Selection
      3. 9.2.3 Motor Speed and Voltage Regulation Application
        1. 9.2.3.1 Tuning Parameters
          1. 9.2.3.1.1 Resistance Parameters
          2. 9.2.3.1.2 KMC and KMC_SCALE
            1. 9.2.3.1.2.1 Case I
            2. 9.2.3.1.2.2 Case II
              1. 9.2.3.1.2.2.1 Method 1: Tuning from Scratch
                1. 9.2.3.1.2.2.1.1 Tuning KMC_SCALE
                2. 9.2.3.1.2.2.1.2 Tuning KMC
              2. 9.2.3.1.2.2.2 Method 2: Using the Proportionality factor
                1. 9.2.3.1.2.2.2.1 Working Example
      4. 9.2.4 Motor Voltage
      5. 9.2.5 Motor Current
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Bulk Capacitance
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Register Map

The following table lists the memory-mapped I2C registers for the DRV8235. The I2C registers are used to configure the DRV8235 and for device diagnostics.

Note:

Do not modify reserved registers or addresses not listed in the register map (Table 8-1). Writing to these registers can have unintended effects. For all reserved bits, the default value is 0b.

Table 8-1 I2C Registers
AddressName76543210Access
0x00FAULT_STATUSFAULTRSVD

STALL

OCP

OVP

TSD

NPOR

RSVDR
0x01

RC_STATUS1

SPEED[7:0]

R
0x02

RC_STATUS2

RSVDR
0x03

RC_STATUS3

RSVDR
0x04

REG_STATUS1

VMTR[7:0]R

0x05

REG_STATUS2

IMTR[7:0]R

0x06

REG_STATUS3

RSVDDUTY_READ[5:0]R
0x07 REG_STATUS4 RSVD
0x08 REG_STATUS5 RSVD

0x09

CONFIG0

EN_OUTEN_OVPEN_STALLVSNS_SEL*RSVD

CLR_FLT

DUTY_CTRL*RW

0x0A

CONFIG1

TINRUSH_LSB[7:0]

RW

0x0B

CONFIG2

TINRUSH_MSB[15:8]

RW

0x0C

CONFIG3

IMODE[1:0]*SMODE*INT_VREF*

TBLANK*

TDEG*

OCP_MODE*TSD_MODE*RW

0x0D

CONFIG4

RSVD

STALL_REP

CBC_REP

PMODE*

I2C_BC*

I2C_EN_IN1

I2C_PH_IN2

RW

0x0E

REG_CTRL0

RSVD

EN_SS

REG_CTRL[1:0]*

PWM_FREQ*

W_SCALE[1:0]

RW

0x0F

REG_CTRL1

WSET_VSET[7:0]

RW

0x10

REG_CTRL2

OUT_FLT[1:0]

PROG_DUTY[5:0]

RW

0x11

RC_CTRL0

RSVDRW

0x12

RC_CTRL1RSVDRW

0x13

RC_CTRL2INV_R_SCALE[1:0] KMC_SCALE[1:0] RSVDRW

0x14

RC_CTRL3INV_R[7:0]RW

0x15

RC_CTRL4

KMC[7:0]

RW

0x16

RC_CTRL5RSVDRW

0x17

RC_CTRL6

RSVDRW
0x18RC_CTRL7KP_DIV[2:0]KP_MUL[4:0]RW
0x19RC_CTRL8KI_DIV[2:0]KI_MUL[4:0]RW
Note:

*Writable only when EN_OUT=0.

Table 8-2 Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
Reset or Default Value
-nValue after reset or the default value