Mechanism & thresholds:
If logic supply drops below VDDPOR_FALL for a time greater than
tPOR, then a power on reset will occur that will hard reset
the device.
Action:
nFAULT pin is de-asserted
Both OUTx is Hi-Z
IPROPI pin is
Hi-Z.
When this supply
recovers above the VDDPOR_RISE level, the device will go
through a wake-up initialization and nFAULT pin will be asserted low
to notify the user on this reset (Refer Wake-up transients).
HW and SPI (S) variant: These
thresholds translate to VMPOR_FALL and VMPOR_RISE as
the logic supply is internally derived from the VM supply
Only for SPI (P) variant:
These thresholds directly map to the VDD pin voltage (VDDPOR_FALL
and VDDPOR_RISE)
Fault reaction: Always retry,
retry time depends on the external supply condition to initiate a device
wake-up