SLVSHB2 February 2024 DRV8262-Q1
PRODUCTION DATA
If at any time the voltage on the VM pin falls below the UVLO threshold voltage:
All the outputs are disabled (High-Z)
nFAULT pin is driven low
The charge pump is disabled
Normal operation resumes (driver operation and nFAULT released) when the VM voltage recovers above the UVLO rising threshold voltage.
If the VM voltage falls below the internal digital reset voltage (3.9V maximum), then the internal logic circuits are disabled and the pull-down on nFAULT is also disabled. So, when VM drops below about 3.9V, nFAULT is pulled high again.