SLVSHB2 February 2024 DRV8262-Q1
PRODUCTION DATA
For an ambient temperature of TA and total power dissipation (PTOT), the junction temperature (TJ) is calculated as -
TJ = TA + (PTOT x RθJA)
Considering a JEDEC standard 4-layer PCB, the junction-to-ambient thermal resistance (RθJA) is 22.2 °C/W .
Assuming 25°C ambient temperature, the junction temperature is calculated as shown below -
For more accurate calculation, consider the dependency of on-resistance of FETs with device junction temperature shown in the Typical Operating Characteristics section.
For example,
At 110.2 °C junction temperature, the on-resistance will likely increase by a factor of 1.4 compared to the on-resistance at 25 °C.
The initial estimate of conduction loss was 3.2 W.
New estimate of conduction loss will therefore be 3.2 W x 1.4 = 4.48 W.
New estimate of the total power loss will accordingly be 5.12 W.
New estimate of junction temperature for the DDW package will be 138.7 °C.
Further iterations are unlikely to increase the junction temperature estimate by significant amount.