SLVSFN2B
September 2021 – February 2022
DRV8311
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
SPI Timing Requirements
7.7
SPI Secondary Device Mode Timings
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Output Stage
8.3.2
Control Modes
8.3.2.1
6x PWM Mode (DRV8311S and DRV8311H variants only)
8.3.2.2
3x PWM Mode (DRV8311S and DRV8311H variants only)
8.3.2.3
PWM Generation Mode (DRV8311S and DRV8311P Variants)
8.3.3
Device Interface Modes
8.3.3.1
Serial Peripheral Interface (SPI)
8.3.3.2
Hardware Interface
8.3.4
AVDD Linear Voltage Regulator
8.3.5
Charge Pump
8.3.6
Slew Rate Control
8.3.7
Cross Conduction (Dead Time)
8.3.8
Propagation Delay
8.3.9
Pin Diagrams
8.3.9.1
Logic Level Input Pin (Internal Pulldown)
8.3.9.2
Logic Level Input Pin (Internal Pullup)
8.3.9.3
Open Drain Pin
8.3.9.4
Push Pull Pin
8.3.9.5
Four Level Input Pin
8.3.10
Current Sense Amplifiers
8.3.10.1
Current Sense Amplifier Operation
8.3.10.2
Current Sense Amplifier Offset Correction
8.3.11
Protections
8.3.11.1
VM Supply Undervoltage Lockout (NPOR)
8.3.11.2
Under Voltage Protections (UVP)
8.3.11.3
Overcurrent Protection (OCP)
8.3.11.3.1
OCP Latched Shutdown (OCP_MODE = 010b)
8.3.11.3.2
OCP Automatic Retry (OCP_MODE = 000b or 001b)
8.3.11.3.3
OCP Report Only (OCP_MODE = 011b)
8.3.11.3.4
OCP Disabled (OCP_MODE = 111b)
8.3.11.4
Thermal Protections
8.3.11.4.1
Thermal Warning (OTW)
8.3.11.4.2
Thermal Shutdown (OTSD)
8.4
Device Functional Modes
8.4.1
Functional Modes
8.4.1.1
Sleep Mode
8.4.1.2
Operating Mode
8.4.1.3
Fault Reset (CLR_FLT or nSLEEP Reset Pulse)
8.5
SPI Communication
8.5.1
Programming
8.5.1.1
SPI and tSPI Format
9
DRV8311 Registers
10
Application and Implementation
10.1
Application Information
10.2
Typical Applications
10.2.1
Three-Phase Brushless-DC Motor Control
10.2.1.1
Detailed Design Procedure
10.2.1.1.1
Motor Voltage
10.2.1.2
Driver Propagation Delay and Dead Time
10.2.1.3
Delay Compensation
10.2.1.4
Current Sensing and Output Filtering
10.2.1.5
Application Curves
10.3
Three Phase Brushless-DC tSPI Motor Control
10.3.1
Detailed Design Procedure
10.4
Alternate Applications
11
Power Supply Recommendations
11.1
Bulk Capacitance
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
12.3
Thermal Considerations
12.3.1
Power Dissipation and Junction Temperature Estimation
13
Device and Documentation Support
13.1
Support Resources
13.2
Trademarks
13.3
Electrostatic Discharge Caution
13.4
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RRW|24
MPQF657A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsfn2b_oa
slvsfn2b_pm
1
Features
Three-phase PWM motor driver
3-Phase brushless DC motors
3-V to 20-V operating voltage
24-V Absolute maximum voltage
High output current capability
5-A Peak current drive
Low on-state resistance MOSFETs
210-mΩ typ R
DS(ON)
(HS + LS) at T
A
= 25°C
Low power sleep mode
1.5-µA at V
VM
= 12-V, T
A
= 25°C
Multiple control interface options
6x PWM control interface
3x PWM control interface
PWM generation mode (SPI/tSPI) with optional calibration between MCU and DRV8311
tSPI interface (DRV8311P)
PWM duty and frequency update over SPI
Control multiple DRV8311P devices using standard 4-wire SPI interface
Supports up to 200-kHz PWM frequency
Integrated current sensing
No external resistor required
Sense amplifier output, one per 1/2-bridge
SPI and hardware device variants
10-MHz SPI communication (SPI/tSPI)
Supports 1.8-V, 3.3-V, and 5-V logic inputs
Built-in 3.3-V ± 4.5%, 100-mA LDO regulator
Integrated protection features
VM undervoltage lockout (UVLO)
Charge pump undervoltage (CPUV)
Overcurrent protection (OCP)
Thermal warning and shutdown (OTW/OTSD)
Fault condition indication pin (nFAULT)