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  • DRV8316C-Q1 Automotive Three-Phase Integrated FET Motor Driver

    • SLVSH52 February   2023 DRV8316C-Q1

      PRODUCTION DATA  

  • CONTENTS
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  • DRV8316C-Q1 Automotive Three-Phase Integrated FET Motor Driver
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings Auto
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SPI Timing Requirements
    7. 7.7 SPI Slave Mode Timings
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Output Stage
      2. 8.3.2  Control Modes
        1. 8.3.2.1 6x PWM Mode (PWM_MODE = 00b or MODE Pin Tied to AGND)
        2. 8.3.2.2 3x PWM Mode (PWM_MODE = 10b or MODE Pin is Connected to AVDD with RMODE)
        3. 8.3.2.3 Current Limit Mode (PWM_MODE = 01b / 11b or MODE Pin is Hi-Z or Connected to AVDD)
      3. 8.3.3  Device Interface Modes
        1. 8.3.3.1 Serial Peripheral Interface (SPI)
        2. 8.3.3.2 Hardware Interface
      4. 8.3.4  Step-Down Mixed-Mode Buck Regulator
        1. 8.3.4.1 Buck in Inductor Mode
        2. 8.3.4.2 Buck in Resistor mode
        3. 8.3.4.3 Buck Regulator with External LDO
        4. 8.3.4.4 AVDD Power Sequencing on Buck Regulator
        5. 8.3.4.5 Mixed mode Buck Operation and Control
      5. 8.3.5  AVDD Linear Voltage Regulator
      6. 8.3.6  Charge Pump
      7. 8.3.7  Slew Rate Control
      8. 8.3.8  Cross Conduction (Dead Time)
      9. 8.3.9  Propagation Delay
        1. 8.3.9.1 Driver Delay Compensation
      10. 8.3.10 Pin Diagrams
        1. 8.3.10.1 Logic Level Input Pin (Internal Pulldown)
        2. 8.3.10.2 Logic Level Input Pin (Internal Pullup)
        3. 8.3.10.3 Open Drain Pin
        4. 8.3.10.4 Push Pull Pin
        5. 8.3.10.5 Four Level Input Pin
      11. 8.3.11 Current Sense Amplifiers
        1. 8.3.11.1 Current Sense Amplifier Operation
      12. 8.3.12 Active Demagnetization
        1. 8.3.12.1 Automatic Synchronous Rectification Mode (ASR Mode)
          1. 8.3.12.1.1 Automatic Synchronous Rectification in Commutation
          2. 8.3.12.1.2 Automatic Synchronous Rectification in PWM Mode
        2. 8.3.12.2 Automatic Asynchronous Rectification Mode (AAR Mode)
      13. 8.3.13 Cycle-by-Cycle Current Limit
        1. 8.3.13.1 Cycle by Cycle Current Limit with 100% Duty Cycle Input
      14. 8.3.14 Protections
        1. 8.3.14.1 VM Supply Undervoltage Lockout (NPOR)
        2. 8.3.14.2 AVDD Undervoltage Lockout (AVDD_UV)
        3. 8.3.14.3 Buck Undervoltage Lockout (BUCK_UV)
        4. 8.3.14.4 VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 8.3.14.5 Overvoltage Protection (OVP)
        6. 8.3.14.6 Overcurrent Protection (OCP)
          1. 8.3.14.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 8.3.14.6.2 OCP Automatic Retry (OCP_MODE = 01b)
          3. 8.3.14.6.3 OCP Report Only (OCP_MODE = 10b)
          4. 8.3.14.6.4 OCP Disabled (OCP_MODE = 11b)
        7. 8.3.14.7 Buck Overcurrent Protection
        8. 8.3.14.8 Thermal Warning (OTW)
        9. 8.3.14.9 Thermal Shutdown (OTSD)
          1. 8.3.14.9.1 OTSD FET
          2. 8.3.14.9.2 OTSD (Non-FET)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Functional Modes
        1. 8.4.1.1 Sleep Mode
        2. 8.4.1.2 Operating Mode
        3. 8.4.1.3 Fault Reset (CLR_FLT or nSLEEP Reset Pulse)
      2. 8.4.2 DRVOFF functionality
    5. 8.5 SPI Communication
      1. 8.5.1 Programming
        1. 8.5.1.1 SPI Format
    6. 8.6 Register Map
      1. 8.6.1 STATUS Registers
      2. 8.6.2 CONTROL Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Three-Phase Brushless-DC Motor Control
        1. 9.2.1.1 Detailed Design Procedure
          1. 9.2.1.1.1 Motor Voltage
          2. 9.2.1.1.2 Using Active Demagnetization
          3. 9.2.1.1.3 Driver Propagation Delay and Dead Time
          4. 9.2.1.1.4 Using Delay Compensation
          5. 9.2.1.1.5 Using the Buck Regulator
          6. 9.2.1.1.6 Current Sensing and Output Filtering
        2. 9.2.1.2 Application Curves
      2. 9.2.2 Three-Phase Brushless-DC Motor Control With Current Limit
        1. 9.2.2.1 Block Diagram
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Motor Voltage
          2. 9.2.2.2.2 ILIM Implementation
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Brushed-DC and Solenoid Load
        1. 9.2.3.1 Block Diagram
        2. 9.2.3.2 Design Requirements
          1. 9.2.3.2.1 Detailed Design Procedure
      4. 9.2.4 Three Solenoid Loads
        1. 9.2.4.1 Block Diagram
        2. 9.2.4.2 Design Requirements
          1. 9.2.4.2.1 Detailed Design Procedure
  10. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • RGF|40
    • MPQF173F
Thermal pad, mechanical data (Package|Pins)
  • RGF|40
    • QFND710
Orderable Information
  • slvsh52_oa
  • slvsh52_pm
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DATA SHEET

DRV8316C-Q1 Automotive Three-Phase Integrated FET Motor Driver

1 Features

  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1: –40°C ≤ TA ≤ 125°C
  • Three-phase BLDC motor driver
    • Cycle-by-cycle current limit to limit phase current
    • Supports up to 200-kHz PWM frequency
    • Active demagnetization to reduce power losses
  • 4.5-V to 35-V operating voltage (40-V abs max)
  • High output current capability: 8-A Peak
  • Low MOSFET on-state resistance
    • 95-mΩ (typ.) RDS(ON) (HS + LS) at TA = 25°C
  • Low power sleep mode
    • 2.5-µA (max.) at VVM = 13.5-V, TA = 25°C
  • Multiple control interface options
    • 6x PWM control interface
    • 3x PWM control interface
    • 6x PWM control interface with cycle by cycle current limit
    • 3x PWM control interface with cycle by cycle current limit
  • Does not require external current sense resistors, built-in current sensing
  • Flexible device configuration options
    • DRV8316CR-Q1: 5-MHz 16-bit SPI interface for device configuration and fault status
    • DRV8316CT-Q1: Hardware pin based configuration
  • Supports 1.8-V, 3.3-V, and 5-V logic inputs
  • Built-in 3.3-V/5-V, 200-mA buck regulator
  • Built-in 3.3-V, 30-mA LDO regulator
  • Delay compensation reduces duty cycle distortion
  • Suite of integrated protection features
    • Supply undervoltage lockout (UVLO)
    • Charge pump undervoltage (CPUV)
    • Overcurrent protection (OCP)
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indication pin (nFAULT)
    • Optional fault diagnostics over SPI interface

2 Applications

  • Brushless-DC (BLDC) Motor Modules
  • Automotive LIDAR
  • Small Automotive Fans and Pumps
  • Automotive Actuators

3 Description

DRV8316C-Q1 integrates three H-bridges with 40-V absolute maximum capability and a very low RDS(ON) of 95 mΩ (high-side + low-side) to enable high power drive capability for 12-V automotive brushless-DC motors. DRV8316C-Q1 provides integrated current sensing which eliminates the need for external sense resistors. DRV8316C-Q1 integrates power management circuits including an voltage-adjustable buck regulator (3.3-V / 5-V, 200-mA) and LDO (3.3-V / 30-mA) that can be used to power external circuits.

DRV8316C-Q1 provides a configurable 6x or 3x PWM control scheme which can be used to implement sensored or sensorless field-oriented control (FOC), sinusoidal control, or trapezoid control using an external microcontroller. DRV8316C-Q1 is capable of driving a PWM frequency of up to 200 kHz. DRV8316C-Q1 is highly configurable either through SPI (DRV8316CR-Q1) or pins (DRV8316CT-Q1) - PWM mode. slew rate, OCP level, current sense gain are some of the configurable features.

A number of protection features including supply undervoltage lockout (UVLO), overvoltage protection (OVP), charge pump undervoltage (CPUV), overcurrent protection (OCP), over-temperature warning (OTW) and over-temperature shutdown (OTSD) are integrated into DRV8316C-Q1 to protect the device, motor, and system against fault events. Fault conditions are indicated by the nFAULT pin.

Refer Application Information for design consideration and recommendation on device usage.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
DRV8316CR-Q1 VQFN (40) 7.00 mm x 5.00 mm
DRV8316CT-Q1 VQFN (40) 7.00 mm x 5.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
Simplified Schematic

4 Revision History

DATE REVISION NOTES
February 2023 * Initial release.

 

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