SLVSGT3 December 2022 DRV8317
PRODUCTION DATA
The SOx pin on the DRV8317 provides an analog voltage proportional to the current flowing in the low side MOSFETs (IOUTx) multiplied by the gain setting (GCSA) of the current sense amplifier. The gain setting is adjustable between four different levels which can be set by the GAIN pin (hardware variant) or the CSA_GAIN register (SPI variant).
Figure 8-19 shows the internal architecture of the current sense amplifiers. The current sense is implemented with a sense FET on each low-side FET of the DRV8317 device. This current information is converted in to a voltage based on the CSAREF pin (VREF) input and the CSA gain setting; this voltage is available on the SOx pin. The CSA output voltage can be calculated using Equation 3
Figure 8-20 shows the IOUTx to CSA output transfer function. In bi-directional operation, the amplifier output for 0-A input is set at VREF/2. Any change in the output phase current results in a corresponding change in the amplifier output as given in Equation 3.
The amplifier has a defined linear region as shown in Figure 8-21.