SLVSGT3 December 2022 DRV8317
PRODUCTION DATA
MIN | MAX | UNIT | |
---|---|---|---|
Power supply pin voltage (VM, VIN_AVDD) | –0.3 | 24 | V |
Power supply voltage ramp during power up (VM) | 2 | V/µs | |
Voltage difference between ground pins (PGND, AGND) | –0.3 | 0.3 | V |
Charge pump voltage (CP) | –0.3 | VM + 6 | V |
Analog regulator pin voltage (AVDD) | –0.3 | 4 | V |
Logic pin input voltage (INHx, INLx, nSCS, nSLEEP, SCLK, SDI, GAIN, MODE, SLEW) | –0.3 | 6 | V |
Logic pin output voltage (SDO) | –0.3 | 6 | V |
Open drain pin output voltage (nFAULT) | –0.3 | 6 | V |
Open drain output current range (nFAULT) | 0 | 5 | mA |
Current sense amplifier reference supply input (CSAREF) | -0.3 | 4 | V |
Current sense amplifier output (SOx) | -0.3 | 4 | V |
Output pin voltage (OUTA, OUTB, OUTC) | –1 | VM + 1 (2) | V |
Ambient temperature, TA | –40 | 125 | °C |
Junction temperature, TJ | –40 | 150 | °C |
Storage tempertaure, Tstg | –65 | 150 | °C |