SLVSHC7 December 2023 DRV8334
PRODUCTION DATA
PIN | I/O(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
GLC | 1 | O | Low-side gate driver output. Connect to the gate of the low-side power MOSFET. |
SLC | 2 | I | Low-side source sense input. Connect to the low-side power MOSFET source. |
SPA | 3 | I | Low-side current shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor. |
SNA | 4 | I | Current sense amplifier input. Connect to the low-side of the current shunt resistor. |
SPB | 5 | I | Low-side current shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor. |
SNB | 6 | I | Current sense amplifier input. Connect to the low-side of the current shunt resistor. |
SPC | 7 | I | Low-side current shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor. |
SNC | 8 | I | Current sense amplifier input. Connect to the low-side of the current shunt resistor. |
DRVOFF | 9 | I | Active high shutdown input to pull-down gate driver outputs GHx and GLx. |
AGND | 10 | PWR | Device ground. |
INHA | 11 | I | High-side gate driver control input. This pin controls the output of the high-side gate driver. |
INLA | 12 | I/O | Low-side gate driver control input. This pin controls the output of the low-side gate driver. This pin can be configured to output buffer of phase comparator by SPI register bit PHC_OUTEN. |
INHB | 13 | I | High-side gate driver control input. This pin controls the output of the high-side gate driver. |
INLB | 14 | I/O | Low-side gate driver control input. This pin controls the output of the low-side gate driver. This pin can be configured to output buffer of phase comparator by SPI register bit PHC_OUTEN. |
INHC | 15 | I | High-side gate driver control input. This pin controls the output of the high-side gate driver. |
INLC | 16 | I/O | Low-side gate driver control input. This pin controls the output of the low-side gate driver. This pin can be configured to output buffer of phase comparator by SPI register bit PHC_OUTEN. |
SDO | 17 | O | Serial data output. |
SDI | 18 | I | Serial data input. |
SCLK | 19 | I | Serial clock input. |
nSCS | 20 | I | Serial chip select. |
nSLEEP | 21 | I | Gate driver nSLEEP. When this pin is logic low the device goes to a low-power sleep mode. |
nFAULT | 22 | OD | Fault indicator output. This pin is pulled logic low during a fault condition and requires an external pullup resistor. |
VREF | 23 | PWR | External voltage reference for current sense amplifiers. |
SOC | 24 | O | Current sense amplifier output. |
SOB | 25 | O | Current sense amplifier output. |
SOA | 26 | O | Current sense amplifier output. |
GND | 27 | PWR | Device ground |
CPL | 28 | PWR | Charge pump switching node. Connect a flying capacitor between the CPH and CPL pins. |
CPH | 29 | PWR | Charge pump switching node. Connect a flying capacitor between the CPH and CPL pins. |
GVDD | 30 | PWR | Gate driver power supply output. Connect a GVDD-rated ceramic between the GVDD and GND pins. |
PVDD | 31 | PWR | Gate driver power supply input. Connect to the bridge power supply. Connect a PVDD-rated ceramic between the PVDD and GND pins. |
CPTL | 32 | PWR | Trickle charge pump switching node. Connect a charge pump flying capacitor between CPTL and CPTH pins. |
CPTH | 33 | PWR | Trickle charge pump switching node. Connect a charge pump flying capacitor between CPTL and CPTH pins. |
VCP | 34 | PWR | Trickle charge pump storage capacitor. Connect a ceramic capacitor between VCP and VDRAIN pins. |
VDRAIN | 35 | PWR | High-side drain sense and charge pump power supply input. |
BSTA | 36 | O | Bootstrap output pin. Connect a bootstrap capacitor between BSTA and SHA |
SHA | 37 | I | High-side source sense input. Connect to the high-side power MOSFET source. |
GHA | 38 | O | High-side gate driver output. Connect to the gate of the high-side power MOSFET. |
GLA | 39 | O | Low-side gate driver output. Connect to the gate of the low-side power MOSFET. |
SLA | 40 | I | Low-side source sense input. Connect to the low-side power MOSFET source. |
SLB | 41 | I | Low-side source sense input. Connect to the low-side power MOSFET source. |
GLB | 42 | O | Low-side gate driver output. Connect to the gate of the low-side power MOSFET. |
GHB | 43 | O | High-side gate driver output. Connect to the gate of the high-side power MOSFET. |
SHB | 44 | I | High-side source sense input. Connect to the high-side power MOSFET source. |
BSTB | 45 | O | Bootstrap output pin. Connect a bootstrap capacitor between BSTB and SHB |
BSTC | 46 | O | Bootstrap output pin. Connect a bootstrap capacitor between BSTC and SHC |
SHC | 47 | I | High-side source sense input. Connect to the high-side power MOSFET source. |
GHC | 48 | O | High-side gate driver output. Connect to the gate of the high-side power MOSFET. |