SLVSDY6A August 2018 – June 2019 DRV8350 , DRV8350R , DRV8353 , DRV8353R
PRODUCTION DATA.
The gate drive LS register is shown in Figure 59 and described in Table 16.
Register access type: Read/Write
10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CBC | TDRIVE | IDRIVEP_LS | IDRIVEN_LS | |||||||
R/W-1b | R/W-11b | R/W-1111b | R/W-1111b |
Bit | Field | Type | Default | Description |
---|---|---|---|---|
10 | CBC | R/W | 1b |
Active only when OCP_MODE = 01b 0b = For VDS_OCP and SEN_OCP, the fault is cleared after tRETRY 1b = For VDS_OCP and SEN_OCP, the fault is cleared when a new PWM input is given or after tRETRY |
9-8 | TDRIVE | R/W | 11b |
00b = 500-ns peak gate-current drive time 01b = 1000-ns peak gate-current drive time 10b = 2000-ns peak gate-current drive time 11b = 4000-ns peak gate-current drive time |
7-4 | IDRIVEP_LS | R/W | 1111b |
0000b = 50 mA 0001b = 50 mA 0010b = 100 mA 0011b = 150 mA 0100b = 300 mA 0101b = 350 mA 0110b = 400 mA 0111b = 450 mA 1000b = 550 mA 1001b = 600 mA 1010b = 650 mA 1011b = 700 mA 1100b = 850 mA 1101b = 900 mA 1110b = 950 mA 1111b = 1000 mA |
3-0 | IDRIVEN_LS | R/W | 1111b |
0000b = 100 mA 0001b = 100 mA 0010b = 200 mA 0011b = 300 mA 0100b = 600 mA 0101b = 700 mA 0110b = 800 mA 0111b = 900 mA 1000b = 1100 mA 1001b = 1200 mA 1010b = 1300 mA 1011b = 1400 mA 1100b = 1700 mA 1101b = 1800 mA 1110b = 1900 mA 1111b = 2000 mA |