SLVSHA4 June   2024 DRV8421

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings Comm
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Truth Tables
      3. 7.3.3 Parallel Operation
      4. 7.3.4 Protection Circuits
        1. 7.3.4.1 OCP
        2. 7.3.4.2 TSD
        3. 7.3.4.3 UVLO
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Bulk Capacitance Sizing
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Community Resources
    2. 9.2 Trademarks
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DRV8421 DRV8421A PWP Package10-Pin HVSSOPTop ViewFigure 5-1 DRV8421A PWP Package10-Pin HVSSOPTop View
DRV8421 DRV8421A 10-Pin SSOPTop View Figure 5-2 DRV8421A 10-Pin SSOPTop View
DRV8421 DRV8421B PWP Package10-Pin HVSSOPTop ViewFigure 5-3 DRV8421B PWP Package10-Pin HVSSOPTop View
DRV8421 DRV8421B 10-Pin SSOPTop ViewFigure 5-4 DRV8421B 10-Pin SSOPTop View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
4-wire input (8421A) 2-wire input (8421B)
IN1 2 3 I Input 1 Controls OUT1
IN2 3 4 I Input 2 Controls OUT2
IN3 4 - I Input 3 Controls OUT3
IN4 5 - I Input 4 Controls OUT4
EN - 2 I Enable Pin Enable or sleep mode input. Device enables with pin pulled high; sleep mode activated with pin pulled low for time more than tSLEEP
nFAULT - 5 OD Fault Indication Pin Pulled logic low with fault condition; open-drain output requires external pullup
OUT1 10 10 O Output 1 Controls OUT1; internal pulldown
OUT2 9 9 O Output 2 Controls OUT2; internal pulldown
OUT3 8 8 O Output 3 Controls OUT3; internal pulldown
OUT4 7 7 O Output 4 Controls OUT4; internal pulldown
GND 6 6 PWR Device ground GND pin to be connected to ground
VM 1 1 PWR Power supply Connect to motor power supply; bypass to GND with a 0.1 and 10μF (minimum) ceramic capacitor rated for VM
(1) I = Input, O = Output, PWR = Power
Table 5-2 External Components
COMPONENT PIN 1 PIN 2 RECOMMENDED
CVM VM GND 10µF (minimum) ceramic capacitor rated for VM
CVM VM GND 0.1µF ceramic capacitor rated for VM
RnFAULT VCC(1) nFAULT >1kΩ
(1) VCC is not a pin on the DRV8421, but a VCC supply voltage pullup is required for open-drain output nFAULT