SLOSE59C May 2020 – July 2022 DRV8424 , DRV8425
PRODUCTION DATA
Figure 7-17 shows the input structure for M0, DECAY0, DECAY1 and ENABLE pins.
Figure 7-17 shows the input structure for M1 and TOFF pins.
Figure 7-19 shows the input structure for STEP, DIR and nSLEEP pins.