SLOSE70 December   2020 DRV8434S

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. 5.1 Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 Indexer Timing Requirements
      1. 6.7.1 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Stepper Motor Driver Current Ratings
        1. 7.3.1.1 Peak Current Rating
        2. 7.3.1.2 RMS Current Rating
        3. 7.3.1.3 Full-Scale Current Rating
      2. 7.3.2  PWM Motor Drivers
      3. 7.3.3  Microstepping Indexer
      4. 7.3.4  Controlling VREF with an MCU DAC
      5. 7.3.5  Current Regulation
      6. 7.3.6  Decay Modes
        1. 7.3.6.1 Slow Decay for Increasing and Decreasing Current
        2. 7.3.6.2 Slow Decay for Increasing Current, Mixed Decay for Decreasing Current
        3. 7.3.6.3 Slow Decay for Increasing Current, Fast Decay for Decreasing current
        4. 7.3.6.4 Mixed Decay for Increasing and Decreasing Current
        5. 7.3.6.5 Smart tune Dynamic Decay
        6. 7.3.6.6 Smart tune Ripple Control
      7. 7.3.7  PWM OFF Time
      8. 7.3.8  Blanking time
      9. 7.3.9  Charge Pump
      10. 7.3.10 Linear Voltage Regulators
      11. 7.3.11 Logic Level, tri-level and quad-level Pin Diagrams
        1. 7.3.11.1 nFAULT Pin
      12. 7.3.12 Protection Circuits
        1. 7.3.12.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.12.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.12.3 Overcurrent Protection (OCP)
          1. 7.3.12.3.1 Latched Shutdown (OCP_MODE = 0b)
          2. 7.3.12.3.2 Automatic Retry (OCP_MODE = 1b)
        4. 7.3.12.4 Stall Detection
        5. 7.3.12.5 Open-Load Detection (OL)
        6. 7.3.12.6 Overtemperature Warning (OTW)
        7. 7.3.12.7 Thermal Shutdown (OTSD)
          1. 7.3.12.7.1 Latched Shutdown (OTSD_MODE = 0b)
          2. 7.3.12.7.2 Automatic Recovery (OTSD_MODE = 1b)
        8.       Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2.      56
      3. 7.4.2 Disable Mode (nSLEEP = 1, ENABLE = 0)
      4. 7.4.3 Operating Mode (nSLEEP = 1, ENABLE = 1)
      5. 7.4.4 nSLEEP Reset Pulse
      6.      Functional Modes Summary
    5. 7.5 Programming
      1. 7.5.1 Serial Peripheral Interface (SPI) Communication
        1. 7.5.1.1 SPI Format
        2. 7.5.1.2 SPI for a Single Target Device
        3. 7.5.1.3 SPI for Multiple Target Devices in Daisy Chain Configuration
        4. 7.5.1.4 SPI for Multiple Target Devices in Parallel Configuration
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stepper Motor Speed
        2. 8.2.2.2 Current Regulation
        3. 8.2.2.3 Decay Mode
        4. 8.2.2.4 Application Curves
        5. 8.2.2.5 Thermal Application
          1. 8.2.2.5.1 Power Dissipation
          2. 8.2.2.5.2 Conduction Loss
          3. 8.2.2.5.3 Switching Loss
          4. 8.2.2.5.4 Power Dissipation Due to Quiescent Current
          5. 8.2.2.5.5 Total Power Dissipation
          6. 8.2.2.5.6 Device Junction Temperature Estimation
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5.1.2 SPI for a Single Target Device

The SPI is used to set device configurations, operating parameters, and read out diagnostic information. The SPI operates in target mode. The SPI input-data (SDI) word consists of a 16-bit word, with 8 bits command and 8 bits of data. The SPI output data (SDO) word consists of 8 bits of status register with fault status indication and 8 bits of register data. Figure 7-23 shows the data sequence between the MCU and the SPI target driver.

GUID-60F9A3C8-FA4C-47D3-BC1D-FCF10F7B13EC-low.gifFigure 7-23 SPI Transaction Between MCU and the device

A valid frame must meet the following conditions:

  • The SCLK pin must be low when the nSCS pin goes low and when the nSCS pin goes high.
  • The nSCS pin should be taken high for at least 500 ns between frames.
  • When the nSCS pin is asserted high, any signals at the SCLK and SDI pins are ignored, and the SDO pin is in the high-impedance state (Hi-Z).
  • Full 16 SCLK cycles must occur.
  • Data is captured on the falling edge of the clock and data is driven on the rising edge of the clock.
  • The most-significant bit (MSB) is shifted in and out first.
  • If the data word sent to SDI pin is less than 16 bits or more than 16 bits, a frame error occurs and the data word is ignored.
  • For a write command, the existing data in the register being written to is shifted out on the SDO pin following the 8-bit command data.