SLVSEA2D August 2020 – April 2024 DRV8714-Q1 , DRV8718-Q1
PRODMIX
Table 8-1 lists the memory-mapped registers for the DRV8718-Q1. All register addresses not listed should be considered as reserved locations and the register contents should not be modified. Descriptions of reserved locations are provided for reference only.
Name | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Type | Addr |
---|---|---|---|---|---|---|---|---|---|---|
IC_STAT1 | SPI_OK | POR | FAULT | WARN | DS_GS | UV | OV | OT_WD_AGD | R | 00h |
VDS_STAT1 | VDS_H1 | VDS_L1 | VDS_H2 | VDS_L2 | VDS_H3 | VDS_L3 | VDS_H4 | VDS_L4 | R | 01h |
VDS_STAT2 | VDS_H5 | VDS_L5 | VDS_H6 | VDS_L6 | VDS_H7 | VDS_L7 | VDS_H8 | VDS_L8 | R | 02h |
VGS_STAT1 | VGS_H1 | VGS_L1 | VGS_H2 | VGS_L2 | VGS_H3 | VGS_L3 | VGS_H4 | VGS_L4 | R | 03h |
VGS_STAT2 | VGS_H5 | VGS_L5 | VGS_H6 | VGS_L6 | VGS_H7 | VGS_L7 | VGS_H8 | VGS_L8 | R | 04h |
IC_STAT2 | PVDD_UV | PVDD_OV | VCP_UV | OTW | OTSD | WD_FLT | SCLK_FLT | RSVD | R | 05h |
IC_STAT3 | RSVD | IC_ID | R | 06h | ||||||
IC_CTRL1 | EN_DRV | EN_OLSC | RSVD | LOCK | CLR_FLT | R/W | 07h | |||
IC_CTRL2 | DIS_SSC | DRVOFF_nFLT | CP_MODE | WD_EN | WD_FLT_M | WD_WIN | WD_RST | R/W | 08h | |
BRG_CTRL1 | HB1_CTRL | HB2_CTRL | HB3_CTRL | HB4_CTRL | R/W | 09h | ||||
BRG_CTRL2 | HB5_CTRL | HB6_CTRL | HB7_CTRL | HB8_CTRL | R/W | 0Ah | ||||
PWM_CTRL1 | HB1_PWM | HB2_PWM | HB3_PWM | HB4_PWM | R/W | 0Bh | ||||
PWM_CTRL2 | HB5_PWM | HB6_PWM | HB7_PWM | HB8_PWM | R/W | 0Ch | ||||
PWM_CTRL3 | HB1_HL | HB2_HL | HB3_HL | HB4_HL | HB5_HL | HB6_HL | HB7_HL | HB8_HL | R/W | 0Dh |
PWM_CTRL4 | HB1_FW | HB2_FW | HB3_FW | HB4_FW | HB5_FW | HB6_FW | HB7_FW | HB8_FW | R/W | 0Eh |
IDRV_CTRL1 | IDRVP_1 | IDRVN_1 | R/W | 0Fh | ||||||
IDRV_CTRL2 | IDRVP_2 | IDRVN_2 | R/W | 10h | ||||||
IDRV_CTRL3 | IDRVP_3 | IDRVN_3 | R/W | 11h | ||||||
IDRV_CTRL4 | IDRVP_4 | IDRVN_4 | R/W | 12h | ||||||
IDRV_CTRL5 | IDRVP_5 | IDRVN_5 | R/W | 13h | ||||||
IDRV_CTRL6 | IDRVP_6 | IDRVN_6 | R/W | 14h | ||||||
IDRV_CTRL7 | IDRVP_7 | IDRVN_7 | R/W | 15h | ||||||
IDRV_CTRL8 | IDRVP_8 | IDRVN_8 | R/W | 16h | ||||||
IDRV_CTRL9 | IDRV_LO1 | IDRV_LO2 | IDRV_LO3 | IDRV_LO4 | IDRV_LO5 | IDRV_LO6 | IDRV_LO7 | IDRV_LO8 | R/W | 17h |
DRV_CTRL1 | VGS_MODE | VGS_IND | VGS_LVL | VGS_HS_DIS | VDS_MODE | VDS_IND | R/W | 18h | ||
DRV_CTRL2 | RSVD | VGS_TDRV_12 | VGS_TDRV_34 | R/W | 19h | |||||
DRV_CTRL3 | RSVD | VGS_TDRV_56 | VGS_TDRV_78 | R/W | 1Ah | |||||
DRV_CTRL4 | VGS_TDEAD_12 | VGS_TDEAD_34 | VGS_TDEAD_56 | VGS_TDEAD_78 | R/W | 1Bh | ||||
DRV_CTRL5 | VDS_DG_12 | VDS_DG_34 | VDS_DG_56 | VDS_DG_78 | R/W | 1Ch | ||||
DRV_CTRL6 | VDS_IDRVN_12 | VDS_IDRVN_34 | VDS_IDRVN_56 | VDS_IDRVN_78 | R/W | 1Dh | ||||
DRV_CTRL7 | RSVD | R/W | 1Eh | |||||||
VDS_CTRL1 | VDS_LVL_1 | VDS_LVL_2 | R/W | 1Fh | ||||||
VDS_CTRL2 | VDS_LVL_3 | VDS_LVL_4 | R/W | 20h | ||||||
VDS_CTRL3 | VDS_LVL_5 | VDS_LVL_6 | R/W | 21h | ||||||
VDS_CTRL4 | VDS_LVL_7 | VDS_LVL_8 | R/W | 22h | ||||||
OLSC_CTRL1 | PU_SH_1 | PD_SH_1 | PU_SH_2 | PD_SH_2 | PU_SH_3 | PD_SH_3 | PU_SH_4 | PD_SH_4 | R/W | 23h |
OLSC_CTRL2 | PU_SH_5 | PD_SH_5 | PU_SH_6 | PD_SH_6 | PU_SH_7 | PD_SH_7 | PU_SH_8 | PD_SH_8 | R/W | 24h |
UVOV_CTRL | PVDD_UV_MODE | PVDD_OV_MODE | PVDD_OV_DG | PVDD_OV_LVL | VCP_UV_MODE | VCP_UV_LVL | R/W | 25h | ||
CSA_CTRL1 | RSVD | CSA_DIV_1 | CSA_GAIN_1 | CSA_DIV_2 | CSA_GAIN_2 | R/W | 26h | |||
CSA_CTRL2 | RSVD | CSA_BLK_SEL_1 | CSA_BLK_1 | R/W | 27h | |||||
CSA_CTRL3 | RSVD | CSA_BLK_SEL_2 | CSA_BLK_2 | R/W | 28h | |||||
RSVD_CTRL | RSVD | R/W | 29h |
Table 8-2 provides advanced control functions described in the Propagation Delay Reduction (PDR), Duty Cycle Compensation (DCC), and Slew Time Control (STC) sections. These are not necessary for typical use cases of the DRV871x-Q1 and may be utilized as needed to meet specific system requirements.
Name | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Type | Addr |
---|---|---|---|---|---|---|---|---|---|---|
AGD_CTRL1 | AGD_THR | AGD_ISTRONG | SET_AGD_12 | SET_AGD_34 | SET_AGD_56 | SET_AGD_78 | R/W | 2Ah | ||
PDR_CTRL1 | PRE_MAX_12 | T_DON_DOFF_12 | R/W | 2Bh | ||||||
PDR_CTRL2 | PRE_MAX_34 | T_DON_DOFF_34 | R/W | 2Ch | ||||||
PDR_CTRL3 | PRE_MAX_56 | T_DON_DOFF_56 | R/W | 2Dh | ||||||
PDR_CTRL4 | PRE_MAX_78 | T_DON_DOFF_78 | R/W | 2Eh | ||||||
PDR_CTRL5 | T_PRE_CHR_12 | T_PRE_DCHR_12 | PRE_CHR_INIT_12 | PRE_DCHR_INIT_12 | R/W | 2Fh | ||||
PDR_CTRL6 | T_PRE_CHR_34 | T_PRE_DCHR_34 | PRE_CHR_INIT_34 | PRE_DCHR_INIT_34 | R/W | 30h | ||||
PDR_CTRL7 | T_PRE_CHR_56 | T_PRE_DCHR_56 | PRE_CHR_INIT_56 | PRE_DCHR_INIT_56 | R/W | 31h | ||||
PDR_CTRL8 | T_PRE_CHR_78 | T_PRE_DCHR_78 | PRE_CHR_INIT_78 | PRE_DCHR_INIT_78 | R/W | 32h | ||||
PDR_CTRL9 | EN_PDR_12 | RSVD | KP_PDR_12 | EN_PDR_34 | RSVD | KP_PDR_34 | R/W | 33h | ||
PDR_CTRL10 | EN_PDR_56 | RSVD | KP_PDR_56 | EN_PDR_78 | RSVD | KP_PDR_78 | R/W | 34h | ||
STC_CTRL1 | T_RISE_FALL_12 | EN_STC_12 | STC_ERR_12 | KP_STC_12 | R/W | 35h | ||||
STC_CTRL2 | T_RISE_FALL_34 | EN_STC_34 | STC_ERR_34 | KP_STC_34 | R/W | 36h | ||||
STC_CTRL3 | T_RISE_FALL_56 | EN_STC_56 | STC_ERR_56 | KP_STC_56 | R/W | 37h | ||||
STC_CTRL4 | T_RISE_FALL_78 | EN_STC_78 | STC_ERR_78 | KP_STC_78 | R/W | 38h | ||||
DCC_CTRL1 | EN_DCC_12 | EN_DCC_34 | EN_DCC_56 | EN_DCC_78 | IDIR_MAN_12 | IDIR_MAN_34 | IDIR_MAN_56 | IDIR_MAN_78 | R/W | 39h |
PST_CTRL1 | FW_MAX_12 | FW_MAX_34 | FW_MAX_56 | FW_MAX_78 | EN_PST_DLY_12 | EN_PST_DLY_34 | EN_PST_DLY_56 | EN_PST_DLY_78 | R/W | 3Ah |
PST_CTRL2 | KP_PST_12 | KP_PST_34 | KP_PST_56 | KP_PST_78 | R/W | 3Bh | ||||
SGD_STAT1 | IDIR_12 | IDIR_34 | IDIR_56 | IDIR_78 | IDIR_WARN_12 | IDIR_WARN_34 | IDIR_WARN_56 | IDIR_WARN_78 | R | 3Ch |
SGD_STAT2 | PCHR_WARN_12 | PCHR_WARN_34 | PCHR_WARN_56 | PCHR_WARN_12 | PDCHR_WARN_12 | PDCHR_WARN_12 | PDCHR_WARN_12 | PDCHR_WARN_12 | R | 3Dh |
SGD_STAT3 | STC_WARN_F_12 | STC_WARN_F_34 | STC_WARN_F_56 | STC_WARN_F_78 | STC_WARN_R_12 | STC_WARN_R_34 | STC_WARN_R_56 | STC_WARN_R_78 | R | 3Eh |