SLVSCI2A June   2014  – June 2014 DRV8802-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Bridge Control
      3. 7.3.3 Current Regulation
      4. 7.3.4 Decay Mode and Braking
      5. 7.3.5 Blanking Time
      6. 7.3.6 nRESET and nSLEEP Operation
      7. 7.3.7 Protection Circuits
        1. 7.3.7.1 Overcurrent Protection (OCP)
        2. 7.3.7.2 Thermal Shutdown (TSD)
        3. 7.3.7.3 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Drive Current
        2. 8.2.2.2 Slow-Decay SR (Brake Mode)
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
    2. 9.2 Power Supply and Logic Sequencing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Information
      1. 10.3.1 Thermal Protection
      2. 10.3.2 Power Dissipation
      3. 10.3.3 Heatsinking
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

The DRV8802-Q1 is designed to operate from an input voltage supply V(VMx) range between 8.2 and 45 V. Two 0.1-µF ceramic capacitors rated for V(VMx) must be placed as close as possible to the VMA and VMB pins respectively (one on each pin). In addition to the local decoupling caps, additional bulk capacitance is required and must be sized accordingly to the application requirements.

9.1 Bulk Capacitance

Bulk capacitance sizing is an important factor in motor drive system design. It is dependent on a variety of factors including:

  • Type of power supply
  • Acceptable supply voltage ripple
  • Parasitic inductance in the power supply wiring
  • Type of motor (Brushed DC, Brushless DC, Stepper)
  • Motor startup current
  • Motor braking method

The inductance between the power supply and motor drive system will limit the rate current can change from the power supply. If the local bulk capacitance is too small, the system will respond to excessive current demands or dumps from the motor with a change in voltage. You should size the bulk capacitance to meet acceptable voltage ripple levels. The datasheet generally provides a recommended value but system level testing is required to determine the appropriate sized bulk capacitor.

bulk_cap_slvsci2.gifFigure 10. Example Setup of Motor Drive System WIth External Power Supply

9.2 Power Supply and Logic Sequencing

No specific sequence exists for powering-up the DRV8802-Q1 device. Digital input signals can be present before V(VMx) is applied. After V(VMx) is applied to the DRV8802-Q1 device, it begins operation based on the status of the control pins.