SLVSAW4G July 2011 – December 2024 DRV8804
PRODUCTION DATA
PIN | I/O(1) | DESCRIPTION | EXTERNAL COMPONENTS OR CONNECTIONS | |||
---|---|---|---|---|---|---|
NAME | SOIC | HTSSOP | SOT-23-THN | |||
POWER AND GROUND | ||||||
GND | 5, 6, 7, 14, 15, 16 | 5, 12, PPAD | 5,12,PPAD | — | Device ground | All pins must be connected to GND. |
VM | 1 | 1 | 1 | — | Device power supply | Connect to motor supply (8.2 V - 60 V). |
CONTROL | ||||||
LATCH | 13 | 11 | 11 | I | Latch input | Rising edge latches shift register to output stage – internal pulldown |
nENBL | 10 | 8 | 8 | I | Enable input | Active low enables outputs – internal pulldown |
RESET | 11 | 9 | 9 | I | Reset input | Active-high reset input initializes internal logic – internal pulldown |
SCLK | 17 | 13 | 13 | I | Serial clock | Serial clock input – internal pulldown |
SDATIN | 18 | 14 | 14 | I | Serial data input | Serial data input – internal pulldown |
SDATOUT | 19 | 15 | 15 | O | Serial data output | Serial data output; push-pull structure; see serial interface section for details |
STATUS | ||||||
nFAULT | 20 | 16 | 16 | OD | Fault | Logic low when in fault condition (overtemperature, overcurrent) |
OUTPUT | ||||||
OUT1 | 3 | 3 | 3 | O | Output 1 | Connect to load 1 |
OUT2 | 4 | 4 | 4 | O | Output 2 | Connect to load 2 |
OUT3 | 8 | 6 | 6 | O | Output 3 | Connect to load 3 |
OUT4 | 9 | 7 | 7 | O | Output 4 | Connect to load 4 |
VCLAMP | 2 | 2 | 2 | — | Output clamp voltage | Connect to VM supply, or zener diode to VM supply |