SLVS854E July 2008 – December 2014 DRV8809
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The DRV8809/DRV8810 provides an integrated motor driver solution. The chip has four H-bridges internally and is configurable to eight different modes of combination motor driver control.
To begin the design process, determine the following:
For one stepper and two DC motor configuration:
If start-up from Ch-B (1.5 V) ≥ Ch-A (5 V), Ch-C 3.3 V should be turned on by the setup register (200 kΩ between C_SELECT pin and GND).
Output voltage is set by external feedback resistor network. For example,
DC-DC converters start up sequence is determined by CSELECT pin and DCDC_MODE combination. Refer to the sections DCDC_MODE for Parallel-Mode Control and DCDC_MODE and C_SELECT Timing Delay and Start-Up Order for details.
Motor configuration is set by SPI register setting. Ramp up device with nSLEEP = Low, then write Setup Register Bits 0 to 3 for motor configuration. Refer to Table 11 for details.
VREF input is typically 2.5V. For example, if Rsense = 5 ohm and Torque (Bit 0 to 1) = 100%
= 500mA
Stepping motor current level is determined by external Rsense value.
Die temperature can be monitored at TH_OUT pin when register is set as Tsense(analog). This is used for evaluation purposes only. Typical characteristics are shown in Figure 37.