DRV8844 Quad ½-H-Bridge Driver IC
1 Features
- Quad 1/2-H-Bridge DC Motor Driver
- Can Drive Four Solenoids, Two DC Motors, One Stepper Motor, or Other Loads
- Full Individual Half Bridge Control
- Low MOSFET On-Resistance
- 2.5-A Maximum Drive Current at 24 V, 25°C
- Floating Input Buffers Allow Dual (Bipolar) Supplies (up to ±30 V)
- Built-In 3.3-V, 10-mA LDO Regulator
- Industry Standard IN/IN Digital Control Interface
- 8-V to 60-V Operating Supply Voltage Range
- Outputs Can Be Connected in Parallel
- Thermally Enhanced Surface Mount Package
2 Applications
- Textile Machines
- Office Automation Machines
- Gaming Machines
- Factory Automation
- Robotics
3 Description
The DRV8844 provides four individually controllable 1/2-H-bridge drivers. It can be used to drive two DC motors, one stepper motor, four solenoids, or other loads. The output driver channel for each channel consists of N-channel power MOSFET’s configured in a 1/2-H-bridge configuration.
The DRV8844 can supply up to 2.5-A peak or 1.75-A RMS output current per channel (with proper PCB heatsinking at 24 V and 25°C) per H-bridge.
Separate inputs to independently control each 1/2-H-bridge are provided. To allow operation with split supplies, the logic inputs and nFAULT output are referenced to a separate floating ground pin.
Internal shutdown functions are provided for over current protection, short circuit protection, undervoltage lockout, and overtemperature.
The DRV8844 is available in a 28-pin HTSSOP package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| DRV8844 | HTSSOP (28) | 9.70 mm × 4.40 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Simplified Schematic
4 Revision History
Changes from C Revision (May 2015) to D Revision
- Added parallel output connection to the Features section Go
- Changed pins 6 and 9 from VNEG to SRC12 and SRC34 (respectively) in the Pin Configuration and Functions section Go
- Added SRC12, SRC34 to VNEG pins parameter to the Absolute Maximum Ratings table Go
- Changed the Functional Block Diagram to show the change of pin 6 and 9 from VNEG to SRC12 and SRC34 Go
- Added parallel output description and sense-resistor option to the Application Information section Go
Changes from B Revision (January 2015) to C Revision
- Added ambient temperature to Recommended Operating Conditions Go
Changes from A Revision (October 2012) to B Revision
- Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
5 Pin Configuration and Functions
Pin Functions
| PIN | TYPE(1) | DESCRIPTION | EXTERNAL COMPONENTS OR CONNECTIONS | |
|---|---|---|---|---|
| NAME | NO. | |||
| POWER AND GROUND | ||||
| CP1 | 1 | P | Charge pump flying capacitor | Connect a 0.01-μF 100-V capacitor between CP1 and CP2. |
| CP2 | 2 | P | Charge pump flying capacitor | |
| LGND | 19 | P | Logic input reference ground | Connect to logic ground. This may be any voltage between VNEG and VM – 8 V. |
| V3P3OUT | 15 | P | 3.3-V regulator output | Bypass to VNEG with a 0.47-μF 6.3-V ceramic capacitor. Can be used to supply VREF. |
| VCP | 3 | P | High-side gate drive voltage | Connect a 0.1-μF 16-V ceramic capacitor to VM. |
| VM | 4, 11 | P | Main power supply | Connect to motor supply (8 V to 60 V). Both pins must be connected to same supply. Bypass to VNEG with a 10-µF (minimum) capacitor. |
| SRC12 | 6 | P | Low-side FET source for OUT1 and OUT2 | Connect to VNEG directly or through optional current-sense resistor |
| SRC34 | 9 | P | Low-side FET source for OUT3 and OUT4 | |
| VNEG | 14, 28, PPAD | P | Negative power supply (dual supplies) or ground (single supply) | |
| CONTROL | ||||
| EN1 | 26 | I | Channel 1 enable | Logic high enables OUT1. Internal pulldown. |
| EN2 | 24 | I | Channel 2 enable | Logic high enables OUT2. Internal pulldown. |
| EN3 | 22 | I | Channel 3 enable | Logic high enables OUT3. Internal pulldown. |
| EN4 | 20 | I | Channel 4 enable | Logic high enables OUT4. Internal pulldown. |
| IN1 | 27 | I | Channel 1 input | Logic input controls state of OUT1. Internal pulldown. |
| IN2 | 25 | I | Channel 2 input | Logic input controls state of OUT2. Internal pulldown. |
| IN3 | 23 | I | Channel 3 input | Logic input controls state of OUT3. Internal pulldown. |
| IN4 | 21 | I | Channel 4 input | Logic input controls state of OUT4. Internal pulldown. |
| nRESET | 16 | I | Reset input | Active-low reset input initializes internal logic and disables the H-bridge outputs. Internal pulldown. |
| nSLEEP | 17 | I | Sleep mode input | Logic high to enable device, logic low to enter low-power sleep mode. Internal pulldown. |
| STATUS | ||||
| nFAULT | 18 | OD | Fault | Logic low when in fault condition (overtemperature, overcurrent, UVLO). Open-drain output. |
| OUTPUT | ||||
| OUT1 | 5 | O | Output 1 | Connect to loads |
| OUT2 | 7 | O | Output 2 | |
| OUT3 | 8 | O | Output 3 | |
| OUT4 | 10 | O | Output 4 | |
| NO CONNECT | ||||
| NC | 12, 13 | — | No connect | No connection to these pins |
