SLVSGF6A May   2023  – October 2023 DRV8849

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Indexer Timing Requirements
    7. 7.7 Typical Operating Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Stepper Motor Driver Current Ratings
        1. 8.3.1.1 Peak Current Rating
        2. 8.3.1.2 RMS Current Rating
        3. 8.3.1.3 Full-Scale Current Rating
      2. 8.3.2 Microstepping Indexer
      3. 8.3.3 Controlling VREF with an MCU DAC
      4. 8.3.4 Current Regulation and Decay Modes
        1. 8.3.4.1 Smart tune Ripple Control
        2. 8.3.4.2 Smart tune Dynamic Decay
        3. 8.3.4.3 Blanking time
      5. 8.3.5 Charge Pump
      6. 8.3.6 Logic Level, tri-level and quad-level Pin Diagrams
      7. 8.3.7 nFAULT Pins
      8. 8.3.8 Protection Circuits
        1. 8.3.8.1 VM Undervoltage Lockout (UVLO)
        2. 8.3.8.2 VCP Undervoltage Lockout (CPUV)
        3. 8.3.8.3 Overcurrent Protection (OCP)
          1. 8.3.8.3.1 Latched Shutdown
          2. 8.3.8.3.2 Automatic Retry
        4. 8.3.8.4 Thermal Shutdown (OTSD)
          1. 8.3.8.4.1 Latched Shutdown
          2. 8.3.8.4.2 Automatic Retry
        5. 8.3.8.5 Fault Condition Summary
    4. 8.4 Device Functional Modes
      1. 8.4.1 Sleep Mode (nSLEEP = 0)
      2. 8.4.2 Disable Mode (nSLEEP = 1, ENABLE = 0)
      3. 8.4.3 Operating Mode (nSLEEP = 1, ENABLE = Hi-Z/1)
      4. 8.4.4 nSLEEP Reset Pulse
      5. 8.4.5 Functional Modes Summary
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Stepper Motor Speed
        2. 9.2.2.2 Current Regulation
        3. 9.2.2.3 Decay Modes
        4. 9.2.2.4 Application Curves
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Bulk Capacitance
  12. 11Device and Documentation Support
    1. 11.1 Related Documentation
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Indexer Timing Requirements

Typical limits are at TJ = 25°C and VVM = 24 V. Over recommended operating conditions unless otherwise noted.
NO. MIN MAX UNIT
1 ƒSTEP Step frequency 500(1) kHz
2 tWH(STEP) Pulse duration, STEP high 970 ns
3 tWL(STEP) Pulse duration, STEP low 970 ns
4 tSU(DIR, Mx) Setup time, DIR or MODEx to STEP rising 200 ns
5 tH(DIR, Mx) Hold time, STEP rising to DIR or MODEx change 200 ns
STEP input can operate up to 500 kHz, but system bandwidth is limited by the motor load.
GUID-20230424-SS0I-ZTJT-NPF0-XWTCCTDDNW4G-low.svg Figure 7-1 STEP and DIR Timing Diagram