SLVSCY9B August 2015 – July 2016 DRV8871
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLY (VM) | ||||||
VM | VM operating voltage | 6.5 | 45 | V | ||
IVM | VM operating supply current | VM = 12 V | 3 | 10 | mA | |
IVMSLEEP | VM sleep current | VM = 12 V | 10 | µA | ||
tON(1) | Turn-on time | VM > VUVLO with IN1 or IN2 high | 40 | 50 | µs | |
LOGIC-LEVEL INPUTS (IN1, IN2) | ||||||
VIL | Input logic low voltage | 0.5 | V | |||
VIH | Input logic high voltage | 1.5 | V | |||
VHYS | Input logic hysteresis | 0.5 | V | |||
IIL | Input logic low current | VIN = 0 V | –1 | 1 | μA | |
IIH | Input logic high current | VIN = 3.3 V | 33 | 100 | μA | |
RPD | Pulldown resistance | To GND | 100 | kΩ | ||
tPD | Propagation delay | INx to OUTx change (see Figure 6) | 0.7 | 1 | μs | |
tsleep | Time to sleep | Inputs low to sleep | 1 | 1.5 | ms | |
MOTOR DRIVER OUTPUTS (OUT1, OUT2) | ||||||
RDS(ON) | High-side FET on resistance | VM = 24 V, I = 1 A, fPWM = 25 kHz | 307 | 360 | mΩ | |
RDS(ON) | Low-side FET on resistance | VM = 24 V, I = 1 A, fPWM = 25 kHz | 258 | 320 | mΩ | |
tDEAD | Output dead time | 220 | ns | |||
Vd | Body diode forward voltage | IOUT = 1 A | 0.8 | 1 | V | |
CURRENT REGULATION | ||||||
VILIM | Constant for calculating current regulation (see Equation 1) | IOUT = 1 A | 59 | 64 | 69 | kV |
tOFF | PWM off-time | 25 | µs | |||
tBLANK | PWM blanking time | 2 | µs | |||
PROTECTION CIRCUITS | ||||||
VUVLO | VM undervoltage lockout | VM falls until UVLO triggers | 6.1 | 6.4 | V | |
VM rises until operation recovers | 6.3 | 6.5 | ||||
VUV,HYS | VM undervoltage hysteresis | Rising to falling threshold | 100 | 180 | mV | |
IOCP | Overcurrent protection trip level | 3.7 | 4.5 | 6.4 | A | |
tOCP | Overcurrent deglitch time | 1.5 | μs | |||
tRETRY | Overcurrent retry time | 3 | ms | |||
TSD | Thermal shutdown temperature | 150 | 175 | °C | ||
THYS | Thermal shutdown hysteresis | 40 | °C |